Single Clock Both Edges - Pod 1 Data - Setup For Maximum Data Rate; Single Clock Both Edges - Pod 1 Data - Measuring Maximum Data Rate - Keysight Technologies 16861A Service Manual

3 Testing 16860 Performance
15 Click the Stop
16 Note the generator frequency setting. This will be used in the next section to verify the data rate.

Single Clock Both Edges - Pod 1 Data - Setup for Maximum Data Rate

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Single Clock Both Edges - Pod 1 Data - Measuring Maximum Data Rate

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toolbar button to stop the data acquisition.
On the 81134A, select the channel 2 setup screen. This is the data channel.
Set the Channel 2 Freq. Divider to 1.
Load the SingleClock_WithMarker.ala configuration file. If asked to save the current configuration
file, click No.
Verify that the Generator is set to the frequency found in the last section as a starting point.
Open the Sampling tab in the Analyzer Setup dialog by clicking the Sampling Setup Icon.
Adjust the sample position using the procedure described earlier by clicking the Eye Scan: Sample
Position and Thresholds button. Select the eye closest to -1 ns.
Close the dialog windows by clicking OK.
Select the Run Repetitive icon
acquire data and the Listing Window will continuously update. A marker search window will
appear and show progress.
If incorrect data is found, the following window will appear. The data in the listing window should
be A's & 5's.
. Let the logic analyzer run for about 1 minute. The analyzer will
Keysight 16860 Series Portable Logic Analyzer Service Guide