Pod 3 Clock - Maximum Clock Rate - Keysight Technologies 16861A Service Manual

Portable logic analyzers
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Pod 3 Clock - Maximum Clock Rate

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10 Continue increasing the generator frequency until the logic analyzer displays an error that the
Keysight 16860 Series Portable Logic Analyzer Service Guide
For this Pod's Clock, record the generator frequency and the Data Rate in the "Maximum State
Data Rate" section of the
"Performance Test Record"
twice the generator frequency.
This section is only applicable to models: 16862A, 16863A & 16864A.
NOTE
Load the MultipleClocks_NoMarker.ala configuration file. If asked to save the current configuration
file, click No.
Disconnect the U4203A Flying Lead Probe Set from channels 1 & 2 of the 81134A pulse
generator output (Bits 2, 6, 10, 14) and clock leads.
Connect the probe set from Pod 3 of logic analyzer to the pulse generator channels 1 & 2 output.
• Clock to Channel 1 Output
• Clock (NOT) Channel 1 Output (not)
• Bits 2 & 10 to Channel 2 Output
• Bits 6 & 14 to Channel 2 Output (not)
Open the Sampling tab in the Analyzer Setup dialog by clicking the Sampling Setup Icon.
In the clock assignment area, set Pod 1 Clock to Don't Care and set Pod 3 Clock to Both Edges.
Close the dialog by clicking OK.
Set the generator frequency to 357 MHz as a starting point.
Click the Run Repetitive
acquiring data repeatedly. Acquired data will start appearing in the Listing window.
Start increasing the frequency on the pulse generator by 1 MHz increments while simultaneously
observing the logic analyzer data acquisition status.
data could not be displayed, or the clock is too fast. It is possible that the error is caused by noise
introduced as the generator frequency is changed.
on page 77. Remember that the data rate is
toolbar button to start a repetitive run on the logic analyzer for
Testing 16860 Performance
55
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16863a16860 series16862a16864a

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