Boot Modes - Texas Instruments SimpleLink CC3200MOD Manual

CC3200MOD
SWRS166 – DECEMBER 2014
START ADDRESS
0x4402 0000
0x4402 1000
0x4402 5000
0x4402 6000
0x4402 D000
0x4402 E000
0x4402 F000
0x4403 0000
0x4403 0000
0x4403 5000
0x4403 7000
0x4403 9000
0xE000 0000
0xE000 1000
0xE000 2000
0xE000 E000
0xE004 0000
0xE004 1000
0xE004 2000
5.9

Boot Modes

5.9.1 Overview
The boot process of the application processor includes two phases. The first phase consists of
unrestricted access to all register space and configuration of the specific device setting. In the second
phase, the application processor executes user-specific code.
Figure 5-3 shows the bootloader flow chart.
48 Detailed Description
Table 5-5. Memory Map (continued)
END ADDRESS
0x4402 0FFF SSPI
0x4402 2FFF GSPI
0x4402 5FFF MCU reset clock manager
0x4402 6FFF MCU configuration space
0x4402 DFFF Global power, reset, and clock manager (GPRCM)
0x4402 EFFF MCU shared configuration
0x4402 FFFF Hibernate configuration
0x4403 FFFF Crypto range (includes apertures for all crypto-related
blocks as follows)
0x4403 0FFF DTHE registers and TCP checksum
0x4403 5FFF MD5/SHA
0x4403 7FFF AES
0x4403 9FFF DES
0xE000 0FFF Instrumentation trace Macrocell™
0xE000 1FFF Data watchpoint and trace (DWT)
0xE000 2FFF Flash patch and breakpoint (FPB)
0xE000 EFFF Nested vectored interrupt controller (NVIC)
0xE004 0FFF Trace port interface unit (TPIU)
0xE004 1FFF Reserved for embedded trace macrocell (ETM)
0xE00F FFFF Reserved
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DESCRIPTION
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COMMENT
Used for external serial
flash
Used by application
processor