Texas Instruments SimpleLink CC3200MOD Manual page 49

Wi-fi and internet-of-things module solution, a single-chip wireless mcu
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Note: For definitions of the SoP mode functional configurations, see
5.9.2 Invocation Sequence/Boot Mode Selection
The following sequence of events occur during the Cortex processor boot:
1. After power-on-reset (POR), the processor starts execution.
2. The processor jumps to the first few lines (FFL) of code in the ROM to determine if the current boot is
the first device-init boot or the second MCU boot. The determination is based on the Device-Init flag in
a secure register. The Device-Init flag is set out of POR. The registers in the secure region are
accessible only in the device-init mode.
3. If the current boot is the first boot, the processor executes the device-init code from ROM.
4. At the end of the boot, the processor clears the Device-Init flag and changes the master ID of the
processor and the DMA. These registers are part of the secure region.
5. The processor resets itself, initiating a second boot.
6. During the second boot, the processor rereads the Device-Init flag, the bit is cleared, and the
processor obtains a different master ID.
7. After executing FFL and the unsecure boot code, the processor jumps to the developer code
(application).
8. For the rest of the operation (until the next power cycle), the Cortex mode is designated the MCU.
During this phase, access to the secure region is restricted.
5.9.3 Boot Mode List
The CC3200 device implements a sense-on-power (SoP) scheme to determine the device operation
mode. The device can be configured to power up in one of the three following modes:
Fn4WJ: Functional mode with a 4-wire JTAG mapped to fixed pins.
Fn2WJ: Functional mode with a 2-wire SWD mapped to fixed pins.
LDfrUART: UART load mode to flash the system during development and in OEM assembly line (for
example, serial flash connected to the CC3200R device).
Copyright © 2014, Texas Instruments Incorporated
Boot Mode =
Boot Mode = LDfrUART
(Fn2WJ or Fn4WJ)
(See Note.)
(See Note.)
Cortex Loads the PC with contents of
0x4 location, which is in ROM and part
of BootCode.
Device-Init
yes
done?
no
Execute Device Init
(From Secure ROM)
Clear
Device-Init-Done
Figure 5-3. Bootloader Flow Chart
Submit Documentation Feedback
Enable Clk to M4, Release
Download the code using
Invoke
SOP=UARTLOAD
yes
SLProgrammer and jump
downloader
no
Valid Apps code in
yes
SFLASH?
no
Infite Loop
Table
5-6.
CC3200MOD
SWRS166 – DECEMBER 2014
M4 Power ON
Reset to M4
to the application
Jump to the user code.
SWAS032-012
Detailed Description
49

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