CC3200MOD
SWRS166 – DECEMBER 2014
Table 4-9. GPIO Output Transition Times (V
DRIVE
DRIVE STRENGTH
STRENGTH
CONTROL BITS
(mA)
2MA_EN=1
14
4MA_EN=1
8MA_EN=1
4.11.2.3.3 GPIO Input Transition Time Parameters
Table 4-10
lists the input transition time parameters.
PARAMETER
CONDITION
Input transition time
(t
,t
), 10% to 90%
r
f
2
4.11.2.4 I
C
The CC3200 microcontroller includes one I
Kbps) transmission speeds.
Figure 4-14
shows the I
I2CSCL
I1
I2CSDA
Table 4-11
lists the I
PARAMETER
PARAMETER
NUMBER
I2
I3
I4
I5
I6
I7
I8
I9
(1) All timing is with 6-mA drive and 20-pF load.
(2) This value depends on the value programmed in the clock period register of I
value programmed in this register.
2
(3) Because I
C is an open-drain interface, the controller can drive logic 0 only. Logic is the result of external pullup. Rise time depends on
the external signal capacitance and external pullup register value.
38
Specifications
MIN
2.9
Table 4-10. GPIO Input Transition Time Parameters
SYMBOL
t
r
t
f
2
C timing diagram.
I2
I4
Figure 4-14. I
2
C timing parameters.
2
Table 4-11. I
PARAMETER NAME
t
Clock low period
LP
t
SCL/SDA rise time
SRT
t
Data hold time
DH
t
SCL/SDA fall time
SFT
t
Clock high time
HT
t
Data setup time
DS
t
Start condition setup
SCSR
time
t
Stop condition setup
SCS
time
Submit Documentation Feedback
= 1.8 V)
supply
T
(ns)
r
NOM
MAX
3.4
4.0
MIN
1
1
2
C module operating with standard (100 Kbps) or fast (400
I6
I5
I7
I8
I3
2
C Timing
(1)
C Timing Parameters
MIN
(2)
See
.
–
NA
–
(2)
See
.
tLP/2
36
24
2
C. Maximum output frequency is the result of the minimal
(1)(2)
(continued)
T
(ns)
f
MIN
NOM
2.2
2.7
MAX
UNIT
3
3
I9
SWAS031-068
MAX
UNIT
-
System clock
(3)
See
.
–
3
–
System clock
System clock
–
System clock
–
System clock
Copyright © 2014, Texas Instruments Incorporated
www.ti.com
MAX
3.3
ns
ns
ns
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