Cc3200 Device Encryption - Texas Instruments SimpleLink CC3200MOD Manual

Wi-fi and internet-of-things module solution, a single-chip wireless mcu

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User manual (19 pages)

Table Of Contents

Table of Contents

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Nested vectored interrupt controller (NVIC) closely integrated with the processor core to achieve low

latency interrupt processing. Features include:

– Bits of priority configurable from 3 to 8

– Dynamic reprioritization of interrupts

– Priority grouping that enables selection of preempting interrupt levels and nonpreempting interrupt

levels

– Support for tail-chaining and late arrival of interrupts, which enables back-to-back interrupt

processing without the overhead of state saving and restoration between interrupts

– Processor state automatically saved on interrupt entry and restored on interrupt exit with no

instruction overhead

– Wake-up interrupt controller (WIC) providing ultra-low power sleep mode support

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Bus interfaces:

– Three advanced high-performance bus (AHB-Lite) interfaces: ICode, DCode, and system bus

interfaces

– Bit-band support for memory and select peripheral that includes atomic bit-band write and read

operations

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Low-cost debug solution featuring:

– Debug access to all memory and registers in the system, including access to memory-mapped

devices, access to internal core registers when the core is halted, and access to debug control

registers even while SYSRESETn is asserted

– Serial wire debug port (SW-DP) or serial wire JTAG debug port (SWJ-DP) debug access

– Flash patch and breakpoint (FPB) unit to implement breakpoints and code patches

5.4