Power-Up And Power-Down Sequences; Power-Up Sequence - GE PACSystems RX7i Reference Manual

Chapter 4. CPU Operation

4.11 Power-Up and Power-Down Sequences

4.11.1 Power-Up Sequence

System power-up consists of the following parts:
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Power-up self-test
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CPU memory validation
▪ System configuration
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Intelligent option module self-test completion
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Intelligent option module dual port interface tests
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I/O system initialization
Power-Up Self-Test
On system power-up, many modules in the system perform a power-up diagnostic self-test. The CPU
module executes hardware checks and software validity checks. Intelligent option modules perform
setup and verification of on-board microprocessors, software checksum verification, local hardware
verification, and notification to the CPU of self-check completion. Any failed tests are queued for
reporting to the CPU during the system configuration portion of the cycle.
If a low or failed battery (or Energy Pack fault) indication is present, a fault is logged in the CPU fault table.
CPU Memory Validation
The next phase of system power-up is the validation of the CPU memory. First, if the system verifies that
user memory areas are still valid. A known area of user memory is checked to determine if data was
preserved. Next, if a ladder diagram program exists, a checksum is calculated across the _MAIN ladder
block. If no ladder diagram program exists, a checksum is calculated across the smallest standalone C
program.
When the system is sure that the user memory is preserved, a known area of the bit cache area is
checked to determine if the bit cache data was preserved. If this test passes, the Bit Cache memory is
left containing its power-up values. (Non-retentive outputs are cleared on a transition from STOP Mode
to RUN Mode.) If the checksum is not valid or the retentive test on the user memory fails, the bit cache
memory is assumed to be in error and all areas are cleared. The CPU is now in a cleared state, the same
as if a new CPU module were installed. All logic and configuration files must be stored from the
programmer to the CPU.
System Configuration
After completing its self-test, the CPU performs the system configuration. It first clears all system
diagnostic bits in the bit cache memory. This prevents faults that were present before power-down but
are no longer present from accidentally remaining as faulted. Then it polls each module in the system for
completion of the corresponding self-test.
The CPU reads information from each module, comparing it with the stored (downloaded) rack/slot
configuration information. Any differences between actual configuration and the stored configuration
are logged in the fault tables.
174 PACSystems* RX7i, RX3i and RSTi-EP CPU Reference Manual GFK-2222AD