Pacsystems I/O System - GE PACSystems RX7i Reference Manual

4.10 PACSystems I/O System

The PACSystems I/O system provides the interface between the CPU and other devices. The PACSystems
I/O system supports:
▪
I/O and Intelligent option modules.
▪
Ethernet Interface
▪
Motion modules (RX3i)
▪
PROFINET: RX3i CPE330, CPE400 and RSTi-EP CPE100/CPE115 all permit one of their LANs to be
configured as an embedded PROFINET Controller (see Section 2.1.6, Embedded PROFINET Controller).
Alternately, the RX3i PROFINET Controller IC695PNC001 installs in the RX3i Main I/O Rack
embedded PROFINET Controller and the IC695PNC001 are used to control remote I/O drops. Refer
to PACSystems RX3i & RSTi-EP PROFINET IO-Controller Manual, GFK-2571G or later. Some examples
of remote drops are:
Standard rack-mounted I/O modules in RX3i racks scanned by the PROFINET scanner
o
IC695PNS001. Refer to PACSystems RX3i PROFINET Scanner Manual, GFK-2737
o A mini-drop consisting of one or two I/O modules and supervised by the IC695CEP001. Refer to
PACSystems RX3i CEP PROFINET Scanner User Manual, GFK-2883.
A Genius Bus supervised by a Genius Communications Gateway (IC695GCG001). Refer to
o
PACSystems RX3i Genius Communications Gateway User Manual, GFK-2892.
▪
The Genius I/O system
o RX7i: A Genius I/O Bus Controller (GBC) module provides the interface between the RX7i CPU
and a Genius I/O bus. Refer to Series 90-70 Genius Bus Controller User's Manual, GFK-2017.
o RX3i: A Genius Communications Gateway (IC695GCG001) provides the interface between
devices on the Genius I/O bus and a PROFINET Controller (IC695PNC001) which is installed in
the RX3i Main I/O rack. Refer to PACSystems RX3i Genius Communications Gateway User
Manual, GFK-2892.
o For information on Genius I/O, refer to Genius I/O System User's Manual, GEK-90486-1 and
Genius I/O Analog and Discrete Blocks User's Manual, GEK-90486-2.
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Note that RX3i CPE400 and RSTi-EP CPE100/CPE115 does not support IC695PNC001, since they are Standalone CPUs. Both
may co-exist on a PROFINET LAN.
GFK-2222AD April 2018
Chapter 4. CPU Operation
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. The
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