Renesas HD151TS207SS Specification Sheet page 25

HD151TS207SS
Renesas clock generator I
1. Write mode
1.1 Controller (host) sends a start bit.
1.2 Controller (host) sends the write address D2 (h).
1.3 Renesas clock generator will acknowledge (Renesas clock gen. sends "Low").
1.4 Controller (host) sends a begin byte M.
1.5 Renesas clock generator will acknowledge (Renesas clock gen. sends "Low").
1.6 Controller (host) sends a byte count N.
1.7 Renesas clock generator will acknowledge (Renesas clock gen. sends "Low").
1.8 Controller (host) sends data from byte M to byte M+N–1.
1.9 Renesas clock generator will acknowledge each byte one at a time.
1.10 Controller (host) sends a stop bit.
1 bit 7 bits
Slave
Start bit
address
1 bit 8 bits
Ack Byte M+1
Rev.1.00, Apr.25.2003, page 25 of 38
2
C Serial Interface Operation
1 bit 1 bit 8 bits
R/W
Ack Begin Byte = M
D2(h)
1 bit
Ack
1 bit 8 bits 1 bit
Ack Byte Count = N Ack
8 bits 1 bit
Byte M+N–1 Ack
8 bits
Byte M
1 bit
Stop bit