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Renesas HD151TS207SS Specification Sheet page 22

Mother board clock generator for intel p4+ chipset (springdale)

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HD151TS207SS
2
I
C Controlled Register Bit Map (cont.)
Byte26 Control Register
Bit
Description
7
PCIF / PCI Clock Skew2
Control Bit3
6
PCIF / PCI Clock Skew2
Control Bit2
5
PCIF / PCI Clock Skew2
Control Bit1
4
PCIF / PCI Clock Skew2
Control Bit0
3
PCIF / PCI Clock Skew1
Control Bit3
2
PCIF / PCI Clock Skew1
Control Bit2
1
PCIF / PCI Clock Skew1
Control Bit1
0
PCIF / PCI Clock Skew1
Control Bit0
Note:
1. PCIF / PCI Clock Skew is Skew1 (= Normal) or Skew1+Skew2 (= Late).
Byte27 Control Register
Bit
Description
7
Reserved
6
PCIF_2 Skew Select Bit
5
PCIF_1 Skew Select Bit
4
PCIF_0 Skew Select Bit
3V66 Clock Skew Control
3
Bit3
3V66 Clock Skew Control
2
Bit2
3V66 Clock Skew Control
1
Bit1
3V66 Clock Skew Control
0
Bit0
Note:
1. Normal = Skew1(B26[3:0]), Late = Skew1(B26[3:0]) +Skew2 (B26[7:4]).
Rev.1.00, Apr.25.2003, page 22 of 38
Contents
Skew2 is "Late" Skew that is Delay
Time from "Normal" Skew1.
0000 = +0.0ns, 1000 = +3.2ns
0001 = +0.4ns, 1001 = +3.6ns
0010 = +0.8ns, 1010 = +4.0ns
0011 = +1.2ns, 1011 = +4.4ns
0100 = +1.6ns, 1100 = +4.8ns
0101 = +2.0ns, 1101 = +5.2ns
0110 = +2.4ns, 1110 = +5.6ns
0111 = +2.8ns, 1111 = +6.0ns
Skew1 is "Normal" Skew.
Delay
Ahead
1000 = +0.0ns, 0111 = –0.4ns
1001 = +0.4ns, 0110 = –0.8ns
1010 = +0.8ns, 0101 = –1.2ns
1011 = +1.2ns, 0100 = –1.6ns
1100 = +1.6ns, 0011 = –2.0ns
1101 = +2.0ns, 0010 = –2.4ns
1110 = +2.4ns, 0001 = –2.8ns
1111 = +2.8ns, 0000 = –3.2ns
Contents
0 = Normal, 1 = Late
0 = Normal, 1 = Late
0 = Normal, 1 = Late
Delay
Ahead
1000 = +0.0ns, 0111 = –0.4ns
1001 = +0.4ns, 0110 = –0.8ns
1010 = +0.8ns, 0101 = –1.2ns
1011 = +1.2ns, 0100 = –1.6ns
1100 = +1.6ns, 0011 = –2.0ns
1101 = +2.0ns, 0010 = –2.4ns
1110 = +2.4ns, 0001 = –2.8ns
1111 = +2.8ns, 0000 = –3.2ns
Type
Default
Note
R/W
0
See
Note
1
R/W
0
R/W
0
R/W
0
R/W
1
See
Note
1
R/W
0
R/W
0
R/W
0
Type
Default
Note
R/W
0
R/W
0
See
R/W
0
Note
1
R/W
0
R/W
1
R/W
0
R/W
0
R/W
0

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