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HD151TS207SS
2
I
C Controlled Register Bit Map (cont.)
Byte28 Control Register
Bit
Description
7
Reserved
6
PCI_6 Skew Select Bit
5
PCI_5 Skew Select Bit
4
PCI_4 Skew Select Bit
3
PCI_3 Skew Select Bit
2
PCI_2 Skew Select Bit
1
PCI_1 Skew Select Bit
0
PCI_0 Skew Select Bit
Note:
1. Normal = Skew1(B26[3:0]), Late = Skew1(B26[3:0]) +Skew2 (B26[7:4]).
Byte29 Control Register
Bit
Description
7
VCH Slew Rate Control Bit1
6
VCH Slew Rate Control Bit0
5
PCI Slew Rate Control Bit1
4
PCI Slew Rate Control Bit0
3
PCIF Slew Rate Control Bit1
2
PCIF Slew Rate Control Bit0
1
3V66 Slew Rate Control Bit1
0
3V66 Slew Rate Control Bit0
Rev.1.00, Apr.25.2003, page 23 of 38
Contents
0 = Normal, 1 = Late
0 = Normal, 1 = Late
0 = Normal, 1 = Late
0 = Normal, 1 = Late
0 = Normal, 1 = Late
0 = Normal, 1 = Late
0 = Normal, 1 = Late
0 = Normal, 1 = Late
Contents
00 = Normal, 10 = "++"
01 = "+"
, 11 = "–"
00 = Normal, 10 = "++"
01 = "+"
, 11 = "–"
00 = Normal, 10 = "++"
01 = "+"
, 11 = "–"
00 = Normal, 10 = "++"
01 = "+"
, 11 = "–"
Type
Default
Note
R/W
0
R/W
0
See
Note
R/W
0
1
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Type
Default
Note
R/W
1
R/W
0
R/W
1
R/W
0
R/W
1
R/W
0
R/W
1
R/W
0
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