Siemens SIMATIC ET 200S Operating Instructions Manual page 52

1Count24V/100kHz
2.6 Count Modes
Acknowledgment Principle in Isochrone Mode
In isochrone mode, exactly 4 bus cycles are always required to reset the status bits and to
accept values during the load function.
Figure 2-19
Error Detection
The program errors must be acknowledged. They have been detected by the
1Count24V/100kHz and are indicated in the feedback interface. A channel-specific diagnosis
is carried out if you have enabled group diagnostics in your parameter assignment (see the
ET 200S Distributed I/O System
The parameter assignment error bit is acknowledged by means of correct parameter
assignment.
Figure 2-20
In the case of continuous error acknowledgment (EXTF_ACK=1) or at CPU/Master Stop, the
1Count24V/100kHz signals errors as soon as they are detected and resets them as soon as
they have been eliminated.
52
Acknowledgment Principle in Isochrone Mode
Manual).
Error Acknowledgment
Technological Functions
Operating Instructions, 02/2007, A5E00124867-05