User Push Buttons (Active-High); Cpu Reset Button (Active-Low) - Xilinx M401 User Manual

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8. User Push Buttons (Active-High)

Five active-High user push buttons are available for general purpose usage and are
arranged in a North-East-South-West-Center orientation (only the center one is cited in
Figure 2, page
Table 7: User Push Button Connections

9. CPU Reset Button (Active-Low)

The CPU reset button is an active-Low push button intended to be used as a system or user
reset button. This button is wired only to an FPGA I/O pin, so it can also be used as a
general purpose button (see
Table 8: CPU Reset Connections
www.BDTIC.com/XILINX
ML401/ML402/ML403 Evaluation Platform
UG080 (v2.5) May 24, 2006
12). Table 7 summarizes the user push button connections.
Reference
Label/Definition
Designator
SW3 GPIO Switch North
SW5 GPIO Switch East
SW4 GPIO Switch South
SW7 GPIO Switch West
SW6 GPIO Switch Center
Reference
Label/Definition
Designator
SW10 FPGA CPU RESET
www.xilinx.com
FPGA Pin
E7
F10
A6
E9
B6
Table 8).
FPGA Pin
D6
Detailed Description
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