Format Of Interrupt Mask Flag Register 0 - NEC PD789860 User Manual

(2) Interrupt mask flag register 0 (MK0)
The interrupt mask flag is used to enable and disable the corresponding maskable interrupts.
MK0 is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets MK0 to FFH.
6
Symbol 7
MK0 1 1
××MK×
0 Enables servicing servicing.
1
Disables servicing servicing.
Cautions 1. Be sure to set bits 5 to 7 to 1.
2. The TMMK4 flag can be read- and write-accessed only when the watchdog timer is
being used as an interval timer.
(3) Program status word (PSW)
The program status word is used to hold the instruction execution result and the current status of the interrupt
requests. The IE flag, used to enable and disable maskable interrupts, is mapped to PSW.
PSW can be read- and write-accessed in 8-bit units, as well as using bit manipulation instructions and
dedicated instructions (EI and DI). When a vectored interrupt is acknowledged, the PSW is automatically
saved to a stack, and the IE flag is reset to 0.
RESET input sets PSW to 02H.
Symbol 7 6 5
PSW IE Z 0
IE
0 Disabled
1 Enabled
140
CHAPTER 14 INTERRUPT FUNCTIONS
Figure 14-3. Format of Interrupt Mask Flag Register 0
5 <4> <3>
LVIMK1
EEMK0
1
Interrupt servicing control
Figure 14-4. Program Status Word Configuration
4 3 2 1
AC 0 0 1
Whether to enable/disable interrupt acknowledgment
User's Manual U14826EJ5V0UD
<2> <1> <0>
TMMK40 TMMK30 TMMK4
0 After reset
CY 02H
Used in the execution of ordinary instructions
Address After reset R/W
FFE4H FFH R/W