Timer 40 Block Diagram - NEC PD789860 User Manual

8-bit timer mode control
register 40 (TMC40)
TCE40 TCL402 TCL401 TCL400 TMD401 TMD400 TOE40
f
CLK
2
f /2
CLK
TMI/P21
TMI/2
2
TMI/2
TMI/2 3
(D)
To Figure 9-1 (D)
Count operation start
signal to timer 30
(in cascade connection mode)
Note For details, see Figure 9-3.
Remark f : f or f
CLK X CC
Figure 9-2. Timer 40 Block Diagram
Internal bus
8-bit compare
register H40
(CRH40)
Decoder
Match
8-bit timer counter 40
(TM40)
Clear
Carrier generator mode
PWM mode
Cascade connection mode
Carrier generator output
control register 40
(TCA40)
8-bit compare
register 40 (CR40) RMC40 NRZB40 NRZ40
Selector
Output controller
F/F
OVF
Reset
(E)
To Figure 9-1 (E)
TM40 timer counter match signal
(in cascade connection mode)
(F)
From Figure 9-1 (F)
TM30 match signal
(in cascade connection mode)
From Figure 9-1 (G)
Timer counter match
(G)
signal from timer 30
(in carrier generator mode)
TMO/P20/BSFO
Note
To Figure 9-1 (C)
Carrier clock
(C)
Output to
EEPROM (data memory)
To Figure 9-1 (A)
Bit 7 of TM40
(A)
(in cascade connection mode)
Internal reset signal
INTTM40
To Figure 9-1 (B)
Timer 40 interrupt request signal
(B)
count clock input
signal to TM30