Standby Function Operation; Halt Mode - NEC PD789860 User Manual

15.2 Standby Function Operation

15.2.1 HALT mode

(1) HALT mode
HALT mode is set by executing the HALT instruction.
The operation statuses in HALT mode are shown in the following table.
Item
System clock
CPU
EEPROM
Port (output latch)
8-bit timer TM30
TM40
Watchdog timer
Power-on-clear POC
circuit
LVI
Bit sequential buffer
Key return circuit
Notes 1. HALT mode can be set after executing a write instruction.
2. If a POC switching circuit is selected by the mask option and the POC circuit is set to operation enabled
by software or if POC circuit normally operating is selected by the mask option (see CHAPTER 18
MASK OPTIONS regarding mask options).
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CHAPTER 15 STANDBY FUNCTION
Table 15-1. Operation Statuses in HALT Mode
System clock oscillation enabled
Clock supply to CPU stopped
Operation stopped
Note 1
Operation enabled
Remains in the state existing before HALT mode has been set
Operation enabled
Operation enabled
Operation enabled
Note 2
Operation enabled
Operation enabled
Operation enabled
Operation stopped
User's Manual U14826EJ5V0UD
HALT Mode Operation Status