Clock Generator Operation - NEC PD789860 User Manual

8.5 Clock Generator Operation

The clock generator generates the following clocks and controls the operation modes of the CPU, such as standby
mode:
• System clock
f
CC
• CPU clock
f
CPU
• Clock to peripheral hardware
The operation of the clock generator is determined by the processor clock control register (PCC) as follows:
(a) The slow mode (8.0
generated (PCC = 02H). While a low level is input to the RESET pin, oscillation of the system clock is
stopped.
(b) Two types of minimum instruction execution time (f
by the PCC setting.
(c) Two standby modes, STOP and HALT, can be used.
(d) The clock for the peripheral hardware is generated by dividing the frequency of the system clock. Therefore,
the peripheral hardware stops when the system clock stops (except for an external input clock).
CHAPTER 8 CLOCK GENERATOR (
µ
s: at 1.0 MHz operation) of the system clock is selected when the RESET signal is
User's Manual U14826EJ5V0UD
µ
PD789861 SUBSERIES)
µ µ
) (2.0 s, 8.0 s: at 1.0 MHz operation) can be selected
CPU
81