NEC PD789860 User Manual page 17

Figure No.
11-9 LVI Circuit Operation Timing .........................................................................................................................131
12-1 Block Diagram of Bit Sequential Buffer .........................................................................................................132
12-2 Format of Bit Sequential Buffer Output Control Register 10 .........................................................................133
12-3 Format of Port Mode Register 2....................................................................................................................133
12-4 Operation Timing of Bit Sequential Buffer .....................................................................................................134
13-1 Block Diagram of Key Return Circuit.............................................................................................................135
13-2 Generation Timing of Key Return Interrupt ...................................................................................................135
14-1 Basic Configuration of Interrupt Function......................................................................................................138
14-2 Format of Interrupt Request Flag Register 0.................................................................................................139
14-3 Format of Interrupt Mask Flag Register 0 .....................................................................................................140
14-4 Program Status Word Configuration .............................................................................................................140
14-5 Flowchart from Non-Maskable Interrupt Request Generation to Acknowledgment (INTWDT)......................142
14-6 Timing of Non-Maskable Interrupt Request Acknowledgment ......................................................................142
14-7 Acknowledgment of Non-Maskable Interrupt Request ..................................................................................142
14-8 Interrupt Request Acknowledgment Processing Algorithm ...........................................................................144
14-9 Interrupt Request Acknowledgment Timing (Example of MOV A, r) .............................................................144
14-10 Interrupt Request Acknowledgment Timing (When Interrupt Request Flag Is Set at Last Clock During
Instruction Execution) ...................................................................................................................................145
14-11 Example of Multiple Interrupts.......................................................................................................................146
15-1 Format of Oscillation Stabilization Time Selection Register ..........................................................................149
15-2 Releasing HALT Mode by Interrupt...............................................................................................................151
15-3 Releasing HALT Mode by RESET Input .......................................................................................................152
15-4 Releasing STOP Mode by Interrupt ..............................................................................................................154
15-5 Releasing STOP Mode by RESET Input.......................................................................................................155
16-1 Block Diagram of Reset Function..................................................................................................................156
16-2 Reset Timing by RESET Input ......................................................................................................................157
16-3 Reset Timing by Watchdog Timer Overflow..................................................................................................157
16-4 Reset Timing by RESET Input in STOP Mode..............................................................................................157
17-1 Environment for Writing Program to EEPROM (Program Memory) ..............................................................160
17-2 Communication Mode Selection Format .......................................................................................................161
17-3 Example of Connection with Dedicated Flash Programmer ..........................................................................162
LIST OF FIGURES (3/4)
Title
User's Manual U14826EJ5V0UD
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