STMicroelectronics STM32L151RE Manual page 96

Electrical characteristics
SPI characteristics
Unless otherwise specified, the parameters given in the following table are derived from
tests performed under the conditions summarized in
Refer to
input/output alternate function characteristics (NSS, SCK, MOSI, MISO).
Symbol
f
SCK
SPI clock frequency
1/t
c(SCK)
(2)
t
r(SCK)
SPI clock rise and fall time
(2)
t
f(SCK)
DuCy(SCK) SPI slave input clock duty cycle
t NSS setup time
su(NSS)
t NSS hold time
h(NSS)
(2)
t
w(SCKH)
SCK high and low time
(2)
t
w(SCKL)
(2)
t
su(MI)
Data input setup time
(2)
t
su(SI)
(2)
t
h(MI)
Data input hold time
(2)
t
h(SI)
(4)
t Data output access time
a(SO)
(2)
t Data output valid time
v(SO)
(2)
t Data output valid time
v(MO)
(2)
t
h(SO)
Data output hold time
(2)
t
h(MO)
1. The characteristics above are given for voltage range 1.
2. Guaranteed by characterization results.
3. The maximum SPI clock frequency in slave transmitter mode is given for an SPI slave input clock duty cycle (DuCy(SCK))
ranging between 40 to 60%.
4. Min time is for the minimum time to drive the output and max time is for the maximum time to validate the data.
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Section 6.3.12: I/O current injection characteristics
Table 49. SPI characteristics
Parameter Conditions
Master mode
Slave mode
Slave transmitter
Capacitive load: C = 30 pF
Slave mode
Slave mode
Slave mode
Master mode
Master mode
Slave mode
Master mode
Slave mode
Slave mode
Slave mode
Master mode
Slave mode
Master mode
DocID025433 Rev 8
STM32L151xE STM32L152xE
Table 13.
for more details on the
(1)
Min
-
-
-
-
30
4t
HCLK
2t
HCLK
t /2− 5
SCK
5
6
5
5
0
-
-
17
0.5
(2)
Max Unit
16
16
MHz
(3)
12
6 ns
70 %
-
-
t /2+3
SCK
-
-
-
ns
-
3t
HCLK
33
6.5
-
-