STM32L151x6/8/B, STM32L152x6/8/B
Revision history
Table 71. Document revision history (continued)
Date
Revision
Changes
Features: updated value of Low-power sleep.
Section 3.3.2: Power supply
supervisor: updated note.
Table 8: STM32L15xx6/8/B pin definitions:
modified main function
(after reset) and alternate function for OSC_IN and OSC_OUT pins;
modified footnote 5; added footnote to OSC32_IN and OSC32_OUT
pins; C1 and D1 removed on PD0 and PD1 pins (TFBGA64
column).
Section 3.11: DAC (digital-to-analog
converter): updated bullet list.
Table 10: Voltage characteristics on page
50: updated footnote 3
regarding I
.
INJ(PIN)
Table 11: Current characteristics on page
50: updated footnote 4
regarding positive and negative injection.
Table 14: Embedded reset and power control block characteristics
on page
52: updated typ and max values for T
(V
RSTTEMPO
DD
rising, BOR enabled).
Table 17: Current consumption in Run mode, code with data
25-Feb-2011
4
processing running from Flash on page
56: removed values for HSI
clock source (16 MHz), Range 3.
Table 18: Current consumption in Run mode, code with data
processing running from RAM on page
57: removed values for HSI
clock source (16 MHz), Range 3.
Table 19: Current consumption in Sleep mode on page 58
removed
values for HSI clock source (16 MHz), Range 3 for both RAM and
Flash; changed units.
Table 20: Current consumption in Low power run mode on page
60:
updated parameter and max value of I
Max (LP Run).
DD
Table 21: Current consumption in Low power sleep mode on
page
61: updated symbol, parameter, and max value of I
Max (LP
DD
Sleep).
Table 22: Typical and maximum current consumptions in Stop mode
on page 62
updated values for I
- RTC clocked by
DD (Stop with RTC)
LSE external clock (32.768 kHz), regulator in LP mode, HSI and
HSE OFF (no independent watchdog).
DocID17659 Rev 10
123/129
128
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