Seven Segment Display - Lattice Semiconductor XP2 Advanced User Manual

Lattice Semiconductor

Seven Segment Display

The 7-segment LED located near the eight LEDs is controlled by LatticeXP2 Bank 4 I/O pins. The connections of
the segments are shown in Figure 3.
Figure 3. 7-Segment Display
LCD
The LCD module connector (J55) is a 2x9 header. This 18-pin header is compatible with quite a few character LCD
modules. Table 17 shows the pin function of the header and the connections to the bank 0 of the LatticeXP2 FPGA.
Table 17. LCD Header Connection
Pin #
1
3
5
7
9
11
13
15
17
The VR4 potentiometer is used to limit the current that flows through the backlight LED on the LCD module. The
VR5 potentiometer is used to adjust the VO voltage that controls the LCD contrast.
When the following LCD modules are used, connect pin 1 to 16 to the backlight LCD module or connect pin 1 to 14
to the non-backlight LCD module:
Optrex:
• C-51505 Series: 20 characters x 2 lines
When the following LCD modules are used, connect pin 3 to 18 to the backlight LCD module or connect pin 3 to 16
to the non-backlight LCD module.
Function LatticeXP2 I/O
Anode —
VSS(GND) —
VO —
R/W AA20
DB0 AB20
DB2 V14
DB4 W14
DB6 U15
Anode —
Evaluation Board User's Guide
Pin # Function
2 Cathode (GND)
4 VDD (5V)
6
8
10
12
14
16
18 Cathode (GND)
12
LatticeXP2 Advanced
LatticeXP2 I/O
—
—
RS U14
E AA21
DB1 AA22
DB3 Y21
DB5 Y22
DB7 V15
—