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Lattice Semiconductor
Table 28. PCI Connector Component Side (Continued)
J11 Pin#
Signal
47
AD[12]
48
AD[10]
49
M66EN
52
AD[8]
53
AD[7]
54
+3.3V
55
AD[5]
56
AD[3]
57
GND
58
AD[1]
59
+VIO
60
ACK64#
61
+5V
62
+5V
Table 29. PCI Connector Solder Side
J56 Pin#
Signal
1
TRST#
2
+12V
3
TMS
4
TDI
5
+5V
6
INTA#
7
INTC#
8
+5V
9
Reserved
10
VIO
11
Reserved
14
+3.3V AUX
15
RST#
16
VIO
17
GNT#
18
GND
19
PME#
20
AD[30]
21
+3.3V
22
AD[28]
23
AD[26]
24
GND
25
AD[24]
26
IDSEL
27
+3.3V
28
AD[22]
29
AD[20]
I/O
I/O
PCI address and data bit 12
I/O
PCI address and data bit 10
O
PCI 66 MHz enable
I/O
PCI address and data bit 8
I/O
PCI address and data bit 7
Vcc
3.3V voltage supply pin
I/O
PCI address and data bit 5
I/O
PCI address and data bit 3
Vss
System ground
I/O
PCI address and data bit 1
Vio
VIO voltage supply pin
I/O
PCI 64-bit acknowledge pin
Vcc
5V voltage supply pin
Vcc
5V voltage supply pin
I/O
I
PCI JTAG TRST# signal
Vcc
12V voltage supply pin
I
PCI JTAG TMS signal
I
JTAG TDI signal
Vcc
5V voltage supply pin
O
PCI INTA# signal
O
PCI INTC# signal
Vcc
5V voltage supply pin
—
Reserved
Vio
VIO voltage supply pin
—
Reserved
Vcca
3.3V auxiliary voltage supply
I
PCI system reset
Vio
VIO voltage supply pin
I
PCI arbitration grant
Vss
System ground
—
I/O
PCI address and data bit 30
Vcc
3.3V voltage supply
I/O
PCI address and data bit 28
I/O
PCI address and data bit 26
Vss
System ground
I/O
PCI address and data bit 24
I
PCI interface control, ID select
Vcc
3.3V voltage supply pin
I/O
PCI address and data bit 22
I/O
PCI address and data bit 20
Evaluation Board User's Guide
Description
Description
21
LatticeXP2 Advanced
LatticeXP2 Connection
AA9
Y9
—
AB11
AA11
+3.3V
AB12
AB13
GND
Y12
—
—
—
—
LatticeXP2 Connection
—
—
—
—
—
AB2
—
—
—
—
—
—
AB3
—
AB4
GND
—
AB5
+3.3V
AA6
Y7
GND
AB7
AA8
+3.3V
V6
U6
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