Lattice Semiconductor XP2 Advanced User Manual page 2

LatticeXP2 Advanced
Lattice Semiconductor Evaluation Board User's Guide
Introduction
The LatticeXP2™ Advanced Evaluation Board provides a convenient platform to evaluate, test and debug user
designs and IP cores targeted for the LatticeXP2-17 FPGA. The board features of a LatticeXP2-17 FPGA in a 484
fpBGA package. The LatticeXP2 I/Os are connected to a rich variety of both generic and application-specific inter-
faces described later in this document.
Important: This document (including the schematics in the appendix) describes LatticeXP2 Advanced Evaluation
Boards marked as Rev B. This marking can be seen on the silkscreen of the printed circuit board, under the Lattice
Semiconductor logo.
The LatticeXP2 is a second-generation non-volatile FPGA device. It combines a Look-up Table (LUT) based FPGA
fabric with Flash non-volatile cells in a flexiFLASH™ architecture. The flexiFLASH approach provides benefits such
as instant-on, small footprint, on chip storage with FlashBAK™ embedded block memories and Serial TAG memory
and design security. The LatticeXP2 also support live updates with TransFR™, 128-bit AES encryption and dual-
boot technologies. The LatticeXP2 devices include LUT-based logic, distributed and embedded memory, Phase
Locked Loops (PLLs), pre-engineered source synchronous I/O and enhanced sysDSP™ blocks.
For a full description of the LatticeXP2 FPGA, see the Lattice website for data sheets, technical notes, technology
summaries and more: www.latticesemi.com.
Some common uses for the LatticeXP2 Advanced Evaluation Board include:
• Video and other DSP processing
• An analog-to-digital, and digital-to-analog mixed signal source/sink
• A single-board computer system
• A platform for evaluating the Input/Output (I/O) characteristics of the FPGA
• A platform for evaluation and development with Lattice IP cores
Features
Key features of the LatticeXP2 Advanced Evaluation Board include:
• SPI Serial Flash device included for low-cost, non-volatile configuration storage
• One 32-bit DDR2 SO-DIMM module connector
• 32-bit PCI connector
• Both a Tri-speed (10/100/1000 Mbit) Ethernet PHY that includes RJ-45, magnetics and spark gap, as well as a
directly wired RJ-45 connector
• RS-232 interface chip and 9-pin D-sub connector
• PS/2 Mouse connector
• USB 1.1 transceiver and USB type-A and type-B connectors
• USB download of LatticeXP2 and power manager bitstreams
• Video TX and RX MDR connectors
• Quad 12-bit ADC and Quad 12-bit DAC
• Two 8-pin DIP switches
• Discrete LEDs and 7-segment LED
• CompactFlash connector for type I and type II CompactFlash cards
• LCD module connector
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