Equalization (Eq) Board - GE LOGIQ 9 Technical Manual

GE M S
EDICAL YSTEMS
D 2294854-100, R
IRECTION
5-3-4

Equalization (EQ) Board

5-3-4-1 General Description
The EQ dynamically gains and filters the received signal output from the final beamformer sum. TGC
control calculates range dependent analog and digital gains. The digital gain is applied to the I/Q signal.
The gained signal is then rotated in frequency to place the frequency of interest in the passband of the
subsequent FIR lowpass filter. The rotator center frequency may also be range dependent. These
controls, and the selection of the FIR coefficients may also be processing bank, vector number, or
transmit focal zone dependent.
SCAN
Scan
Control
Control
I/F
Bus
CLK-10MHZ
Local
Analog
Board
Delay
Control
Gain
Mod's
Delay
5
Td: I-dat
BARREL
I (L,R)
SHIFTER
21
5
Td: Q-dat
Q (L,R)
21
CLK-10MHZ
5-14
PROPRIETARY TO GE
3
EVISION
EQ Board Block Diagram
Local
Board
Control
Temperature
Monitoring
Circuits
IIC Voltage
A/D Monitoring
Converters Circuits
IIC
SPROM
Analog
Base
TGC TGC
Dynamic
Apodization
Gain
Mod's
LUT
16
5
I (L,R) I (L,R)
17 16
MULTIPLIER NCOM
Q (L,R)
Q (L,R)
16
17
Figure 5-12 EQ Board Block Diagram
Section 5-3 - Front End Processor
Local
XDIF
Board
and
Control
Probe I/F
Local
Commutat
Board
or
Control
Control I/F
Local
Digital V-Ref
Board
TGC Gen
Control
I (L,R) I (L,R)
FIR
16 16
NCO
FPGA
Q (L,R) Q (L,R)
FIR
16 16
LOGIQ™ 9 P
ROPRIETARY
XDIF/Probe Bus
To: XDIF & Relay
Comm Control Bus
To: XDIF
TGC Bus
To: TDs
MUX
Coef
RAM
I (L,R) I (L,R)
BARREL
16 16
SHIFT
Data Pipe Bus
AND
To: BMP/SCB
Q (L,R) OUTPUT Q (L,R)
FPGA
16 16
Coef
RAM
M
ANUAL