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TMS320C6670
Multicore Fixed and Floating-Point System-on-Chip
SPRS689D—March 2012
There is a Central Processor Time Synchronization (CPTS) submodule in the Ethernet switch module that can be
used for time synchronization. Programming this register selects the clock source for the CPTS_RCLK. Please see
the see the Gigabit Ethernet (GbE) Switch Subsystem for KeyStone Devices User Guide in
Documentation from Texas Instruments'' on page 66
synchronization module. The register CPTS_RFTCLK_SEL for reference clock selection of time synchronization
submodule is shown in
Figure
Figure 7-49
RFTCLK Select Register (CPTS_RFTCLK_SEL)
31
Legend: R = Read only; -x, value is indeterminate
Table 7-76
RFTCLK Select Register Field Descriptions
Bit
Field
31-3
Reserved
2-0
CPTS_RFTCLK_SEL
End of Table 7-76
208
TMS320C6670 Peripheral Information and Electrical Specifications
7-49.
Reserved
R - 0
Description
Reserved. Read as zero.
Reference clock select. This signal is used to control an external multiplexer that selects one of 8 clocks for time sync
reference (RFTCLK). This CPTS_RFTCLK_SEL value can be written only when the CPTS_EN bit is cleared to 0 in the
TS_CTL register.
000 = SYSCLK2
001 = SYSCLK3
010 = TIMI0
011 = TIMI1
1xx = Reserved
for the register address and other details about the time
Copyright 2012 Texas Instruments Incorporated
www.ti.com
2.9 ''Related
3
2
0
CPTS_RFTCLK_SEL
RW - 0
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