Texas Instruments TMS320C6670 Data Manual page 180

TMS320C6670
Multicore Fixed and Floating-Point System-on-Chip
SPRS689D—March 2012
Table 7-50 Master ID Settings (Part 2 of 3)
Master ID C6670
8 CorePac0 CFG
9 CorePac1 CFG
10 CorePac2 CFG
11 CorePac3 CFG
12 Reserved
13 Reserved
14 Reserved
15 Reserved
16 EDMA0_TC0 read
17 EDMA0_TC0 write
18 EDMA0_TC1 read
19 EDMA0_TC1 write
20 EDMA1_TC0 read
21 EDMA1_TC0 write
22 EDMA1_TC1 read
23 EDMA1_TC1write
24 EDMA1_TC2 read
25 EDMA1_TC2 write
26 EDMA1_TC3 read
27 EDMA1_TC3 write
28 EDMA2_TC0 read
29 EDMA2_TC0 write
30 EDMA2_TC1 read
31 EDMA2_TC1 write
32 EDMA2_TC2 read
33 EDMA2_TC2 write
34 EDMA2_TC3 read
35 EDMA2_TC3 write
36 to 37 Reserved
38 to 39 SRIO PKTDMA
40 FFTC_A
41 Reserved
42 FFTC_B
43 Reserved
44 RAC_B_BE0
45 RAC_B_BE1
46 RAC_A_BE0
47 RAC_A_BE1
48 DebugSS
49 EDMA3CC0
50 EDMA3CC1
51 EDMA3CC2
52 MSMC
53 PCIe
180 TMS320C6670 Peripheral Information and Electrical Specifications
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Copyright 2012 Texas Instruments Incorporated
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