Table of Contents
Advertisement
8XC196L X SUPPLEMENT
XTAL1
PH1
PH2
CLKOUT
Figure 2-3. Internal Clock Phases (Assumes PLL is Bypassed)
The combined period of phase 1 and phase 2 of the internal CLKOUT signal defines the basic
time unit known as a state time or state. Table 2-2 lists state time durations at various frequencies.
(Frequency Input to the
Divide-by-two Circuit)
The following formulas calculate the frequency of PH1 and PH2, the duration of a state time, and
the duration of a clock period (t).
f
PH1 (in MHz)
PH2
=
-- -
=
2
Because the device can operate at many frequencies, this manual defines time requirements (such
as instruction execution times) in terms of state times rather than specific measurements.
Datasheets list AC characteristics in terms of clock periods (t; sometimes called T
Figure 2-4 illustrates the timing relationships between the input frequency (F
frequency (f), and the CLKOUT signal with each PLLEN pin configuration. Table 2-3 details the
relationships between the input frequency (F
the clock period (t), and state times.
2-4
t
t
1 State Time
Phase 1
Phase 2
Table 2-2. State Times at Various Frequencies
f
8 MHz
12 MHz
16 MHz
20 MHz
State Time (in µs)
XTAL
1 State Time
Phase 1
Phase 2
State Time
250 ns
167 ns
125 ns
100 ns
2
=
-- -
f
), the PLLEN pin, the operating frequency (f),
1
A0805-01
1
t
=
-- -
f
).
osc
), the operating
1
XTAL
Advertisement
Table of Contents
