CHAPTER 1
1.1
MANUAL CONTENTS ................................................................................................... 1-1
1.2
RELATED DOCUMENTS .............................................................................................. 1-2
CHAPTER 2
2.1
2.2
BLOCK DIAGRAM......................................................................................................... 2-2
2.3
INTERNAL TIMING........................................................................................................ 2-2
2.4
EXTERNAL TIMING ...................................................................................................... 2-5
2.5
INTERNAL PERIPHERALS ........................................................................................... 2-6
2.5.1
I/O Ports ....................................................................................................................2-7
2.5.2
2.5.3
Event Processor Array ..............................................................................................2-7
2.5.4
2.6
DESIGN CONSIDERATIONS........................................................................................ 2-7
CHAPTER 3
3.1
ADDRESS PARTITIONS ............................................................................................... 3-1
3.2
REGISTER FILE ............................................................................................................ 3-2
3.3
3.4
WINDOWING................................................................................................................. 3-6
CHAPTER 4
4.1
4.2
INTERRUPT REGISTERS............................................................................................. 4-2
4.2.1
4.2.2
4.2.3
CHAPTER 5
5.1
I/O PORTS OVERVIEW ................................................................................................ 5-1
5.2
5.2.1
5.2.2
5.3
CONTENTS
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