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internal address
interrupt controller
interrupt latency
interrupt service routine
interrupt vector
J1850
ISR
linearity errors
LONG-INTEGER
LSB
LSW
The 24-bit address that the microcontroller generates.
See also external address.
The module responsible for handling interrupts that
are to be serviced by interrupt service routines that
you provide. Also called the programmable interrupt
controller (PIC).
The total delay between the time that an interrupt is
generated (not acknowledged) and the time that the
microcontroller begins executing the interrupt service
routine or PTS routine. Determine the instruction in
your code that has the longest execution time and use
that execution time in calculating interrupt latency.
A software routine that you provide to service a
standard interrupt request.
A location in special-purpose memory that holds the
starting address of an interrupt service routine.
An integrated communications controller peripheral
that supports the 10.4 Kb/s variable pulse-width
(VPW) medium-speed, class B, in-vehicle network
protocol.
See interrupt service routine.
See differential nonlinearity and nonlinearity.
A 32-bit, signed variable with values from –2
31
through +2
–1.
1) Least-significant bit of a byte or least-significant
byte of a word.
2) In an A/D converter, the reference voltage divided
n
by 2
, where n is the number of bits to be converted.
For a 10-bit converter with a reference voltage of 5.12
volts, one LSB is equal to 5.0 millivolts (5.12 2
Least-significant word of a double-word or quad-
word.
GLOSSARY
31
10
).
Glossary-5
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