Ports 3 And 4 Internal Structure (87C196La, Lb Only) - Intel 87C196CA Supplement To User’s Manual

8XC196L X SUPPLEMENT
Internal Bus
P x _REG
Address/Data
Bus Control Select
0 = Address/Data
1 = I/O
P34_DRV
Read Port
Figure 5-2. Ports 3 and 4 Internal Structure (87C196LA, LB Only)
5-6
1
0
Sample
Latch
P x _PIN
Q D
LE
PH1 Clock
300ns Delay
RESET#
V
RESET#
V
150 to 200
Buffer
Medium
Pullup
Q3
V
SS
Weak
Pullup
Q4
V
SS
CC
Q1
I/O Pin
Q2
SS
R1
A5264-01