Intel SL3QA - Pentium III 550 MHz Processor Specification page 75

Specification update
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Errata
Workaround:
Software should always poll the Delivery Status bit in the APIC ICR and ensure
that it is '0' (Idle) before writing a new value to the ICR.
Status:
For the steppings affected see the Summary of Changes at the beginning of this
section
E76.
High Temperature and Low Supply Voltage Operation May Result in
Incorrect Processor Operation
Problem:
When operating at the high temperature, low supply voltage corner of the processor
specification, if there is a store pending in the processor's fill buffer, and
simultaneously a load operation misses the L1 cache but results in a hit to the L2
cache, then it is possible that incorrect data may be returned to satisfy the load
operation.
Implication: When this erratum is encountered, unpredictable software behavior may occur. It can
be seen from the table of affected steppings that this erratum is constrained to a
single stepping and is only possible in processors operating at frequencies of 933MHz
and above and is not present in all of those processors. Application of the workaround
will prevent occurrence of the erratum in all processors of that stepping.
Workaround:
It is possible for BIOS code to contain a workaround for this erratum.
Status:
For the steppings affected see the Summary of Changes at the beginning of this
section
E77.
During Boundary Scan, BCLK not Sampled High When SLP# is
Asserted Low
Problem:
During boundary scan, BCLK is not sampled high when SLP# is asserted low.
Implication: Boundary scan results may be incorrect when SLP# is asserted low.
Workaround:
Do not use boundary scan when SLP# is asserted low.
Status:
For the steppings affected see the Summary of Changes at the beginning of this
section.
E78.
Incorrect Assertion of THERMTRIP# Signal
Problem:
The internal control register bit responsible for operation of the Thermtrip circuit
functionality may power up in a non-initialized state. As a result, THERMTRIP# may
be incorrectly asserted during de-assertion of RESET# at nominal operating
temperatures.
processor may shut down internally and stop execution but in few cases continue to
execute.
Implication: This issue can lead to intermittent system power-on boot failures. The occurrence
and repeatability of failures is system dependent, however all systems and
processors are susceptible to failure.
execution during the event of a valid THERMTRIP# assertion resulting in the potential
for permanent processor damage
Specification Update
When THERMTRIP# is asserted as a result of this erratum, the
In addition, the processor may fail to stop
75

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