Intel SL3QA - Pentium III 550 MHz Processor Specification page 16

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cB cC cD tA tB
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Summary Tables of Changes
Plans
Fixed Livelock may occur due to IFU line eviction
Selector for the LTR/LLDT register may get
Fixed
corrupted
NoFix INIT does not clear global entries in the TLB
NoFix VM bit will be cleared on a double fault
handler
NoFix Memory aliasing with inconsistent A and D
bits may cause processor deadlock
Use of memory aliasing with inconsistent
NoFix
memory type may cause system hang
Processor may report invalid TSS fault
NoFix instead of Double fault during mode C
paging
Machine check exception may occur when
NoFix interleaving code between different memory
types
Wrong ESP register values during a fault in
NoFix
VM86 mode
APIC ICR write may cause interrupt not to be
NoFix
sent when ICR delivery bit pending
High temperature and low supply voltage
Fixed operation may result in incorrect processor
operation
During Boundary Scan, BCLK not Sampled
PlanFix
High When SLP# is Asserted Low
NoFix Incorrect assertion of THERMTRIP# Signal
Processor might not exit Sleep State
NoFix properly upon de-assertion of CPUSLP#
signal
The Instruction Fetch Unit (IFU) may fetch
Fixed instructions based upon stale CR3 data after
a write to CR3 register
Under Some Complex Conditions, the
NoFix Instructions in the Shadow of a JMP FAR may
be Unintentionally Executed and Retired
Processor Does not Flag #GP on Non-zero
NoFix
Write to Certain MSRs
NoFix IFU/BSU Deadlock May Cause System Hang
NoFix REP MOVS Operation in Fast string Mode
Continues in that Mode When Crossing into a
Page with a Different Memory Type
ERRATA
Specification Update