Intel SL3QA - Pentium III 550 MHz Processor Specification page 21

Identification Information
Mixed Steppings in DP Systems
Intel Corporation fully supports mixed steppings of Pentium III processors. The following list and
processor matrix describes the requirements to support mixed steppings:
• Mixed steppings are only supported with processors that have identical family and model
number as indicated by the CPUID instruction.
While Intel has done nothing to specifically prevent processors operating at differing
•
frequencies from functioning within a multiprocessor system, there may be uncharacterized
errata that exist in such configurations. Intel does not support such configurations. In mixed
stepping systems, all processors must operate at identical frequencies (i.e., the highest
frequency rating commonly supported by all processors).
• While there are no known issues associated with the mixing of processors with differing
cache sizes in a dual processor system, and Intel has done nothing to specifically prevent
such system configurations from operating, Intel does not support such configurations since
there may be uncharacterized errata that exist. In dual processor systems, all processors
must be of the same cache size.
While Intel believes that certain customers may wish to perform validation of system
•
configurations with mixed frequency or cache sizes, and that those efforts are an acceptable
option to our customers, customers would be fully responsible for the validation of such
configurations.
The workarounds identified in this and following specification updates must be properly
•
applied to each processor in the system. Certain errata are specific to the dual processor
environment and are identified in the Mixed Stepping Processor Matrix found at the end of
this section. Errata for all processor steppings will affect system performance if not properly
worked around. Also see the "Pentium ® III Processor Identification and Package
Information" table for additional details on which processors are affected by specific errata.
• In dual processor systems, the processor with the lowest feature-set, as determined by the
CPUID Feature Bytes, must be the Bootstrap Processor (BSP). In the event of a tie in
feature-set, the tie should be resolved by selecting the BSP as the processor with the lowest
stepping as determined by the CPUID instruction.
In the following processor matrix a number indicates that a known issue has been identified as
listed in the table following the matrix. A dual processor system using mixed processor steppings
must assure that errata are addressed appropriately for each processor.
Specification Update 21