Intel SL3QA - Pentium III 550 MHz Processor Specification page 72

Implication: If this erratum occurs, the processor will hang in a live lock-situation, and the system
will require a reset to continue normal operation.
Workaround: None identified
Status: For the steppings affected see the Summary of Changes at the beginning of this
section.
E67. Selector for the LTR/LLDT Register May Get Corrupted
Problem: The internal selector portion of the respective register (TR, LDTR) may get corrupted,
if during a small window of LTR or LLDT system instruction execution, the following
sequence of events occur:
1. Speculative write to a segment register that might follow the LTR or LLDT
instruction
2. The read segment descriptor of LTR/LLDT operation spans a page (4 Kbytes)
boundary; or causes a page fault
Implication: Incorrect selector for LTR, LLDT instruction could be used after a task switch.
Workaround: Software can insert a serializing instruction between the LTR or LLDT instruction
and the segment register write.
Status: For the steppings affected see the Summary of Changes at the beginning of this
section.
E68. INIT Does Not Clear Global Entries in the TLB
Problem: INIT may not flush a TLB entry when:
1. The processor is in protected mode with paging enabled and the page global
enable flag is set (PGE bit of CR4 register)
2. G bit for the page table entry is set
3. TLB entry is present in TLB when INIT occurs
Implication: Software may encounter unexpected page fault or incorrect address translation due
to a TLB entry erroneously left in TLB after INIT.
Workaround: Write to CR3, CR4 or CR0 registers before writing to memory early in BIOS code
to clear all the global entries from TLB.
Status: For the steppings affected see the Summary of Changes at the beginning of this
section
E69. VM Bit will be Cleared on a Double Fault Handler
Problem: Following a task switch to a Double Fault Handler that was initiated while the
processor was in virtual-8086 (VM86) mode, the VM bit will be incorrectly cleared in
EFLAGS.
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Errata
Specification Update