3
SPECIFICATIONS
Address
Hexadecimal Decimal
32
H
to
35
H
36
H
37
H
38
H
39
H
3A
H
to
3D
H
3E
H
3F
H
40
H
41
H
42
H
43
H
44
H
45
H
46
H
to
55
H
56
H
57
H
58
H
59
H
5A
H
5B
H
5C
H
5D
H
5E
H
5F
H
60
H
61
H
62
H
63
H
64
H
65
H
66
H
to
75
H
76
H
77
H
78
H
3 - 47
Table 3.9 Buffer memory assignment of Q62AD-DGH (2/4)
50
to
System area
53
54
CH1 Digital output value(32Bit) (L)
55
56
CH2 Digital output value(32Bit) (L)
57
58
to
System area
61
62
CH1 Maximum value(32Bit) (L)
63
64
CH1 Minimum value(32Bit) (L)
65
66
CH2 Maximum value(32Bit) (L)
67
68
CH2 Minimum value(32Bit) (L)
69
70
to
System area
85
86
CH1 Process alarm lower lower limit value (L)
87
88
CH1 Process alarm lower upper limit value (L)
89
90
CH1 Process alarm upper lower limit value (L)
91
92
CH1 Process alarm upper upper limit value (L)
93
94
CH2 Process alarm lower lower limit value (L)
95
96
CH2 Process alarm lower upper limit value (L)
97
98
CH2 Process alarm upper lower limit value (L)
99
100
CH2 Process alarm upper upper limit value (L)
101
102
to
System area
117
118
CH1 Rate alarm warning detection period
119
CH2 Rate alarm warning detection period
120
System area
Description
(H)
(H)
(H)
(H)
(H)
(H)
(H)
(H)
(H)
(H)
(H)
(H)
(H)
(H)
MELSEC-Q
Default
Read/Write
Reference
1
value
—
—
—
0
R
Section
3.4.15
0
R
—
—
—
2
0
R/W
2
0
R/W
Section
3.4.16
2
0
R/W
2
0
R/W
—
—
—
2
0
R/W
2
0
R/W
2
0
R/W
2
0
R/W
Section
3.4.17
2
0
R/W
2
0
R/W
2
0
R/W
2
0
R/W
—
—
—
2
0
R/W
Section
2
3.4.18
0
R/W
—
—
—
3 - 47