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S5-95F
Interrupt Generation
An interrupt is triggered by a negative edge at an enabled interrupt input.
In the event of an interrupt, the S5-95F automatically invokes OB2. If OB2 has not been
programmed, the cyclic or time-controlled program is immediately resumed.
The cyclic program can be interrupted after each STEP 5 statement.
Interrupt processing can be disabled with the IA operation and (re)enabled with the RA operation.
RA is the default. When "IA" is in force, interrupts are stored (see Interrupt priority).
Interrupt Priority
The OB2 interrupt processing routine cannot be interrupted. If other OB2 interrupts are generated
while OB2 is executing, they are stored and OB2 reinvoked when it has terminated.
Ascertaining the Cause of an Interrupt
Negative signal edges generate an interrupt at one or more interrupt inputs.
When an interrupt is generated,
•
OB2 is invoked, if programmed
•
The relevant bit in diagnostic byte IB 60 is set to "1", even if OB2 has not been programmed.
The bits are read immediately into the PII (there is no waiting for the cyclic read-in).
Diagnostic Byte IB 60
7
6
5
4
Other Responses to Passivation of Interrupt DI Byte 59
Interrupt DI and onboard DQ must be assigned to the same signal group if the process requires that
passivation of interrupt DI byte 59 trigger immediate disabling of onboard DQ byte 32.
If you assign interrupt DI and onboard DQ to different signal groups on parameter assignment, the
onboard DQ will not be disabled automatically on passivation of the interrupt DI. In this case, you
must include the response for the onboard DQ in the user program.
EWA 4NEB 812 6210-02
3
2
1
0
Bit for I 59.0
Bit for I 59.1
Bit for I 59.2
Bit for I 59.3
Interrupt Processing
12-3
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