HP 3562A Service Manual page 509

MO D E L 3S62A
LOCAL B U S
The local bus test shou ld be used to test the operation of the local data b u s and the AM9S1 3
cou nter i n the data point cou nter b lock. The local data bus is used by the system CPU
to com m u n icate with blocks on both D FA boards. See the b lock d iagrams for the AS,
A6 boards in Section V I . On the A6 board these blocks are the interrupts b lock, the measure­
ment state m achine block, and the data poi nter block. O n the AS board this bus i nterfaces
to both d ig ital fi lter busses and the DMA bus.
T h i s test m ust pass before any other DFA d i agnostic self-test can pass. The local bus test
uses the AM9S1 3 cou nter (A6 U 1 09) to echo data on the local data b u s (LDO to LD1 S)
through the system data bus i nterface. The test echos data several times, u s i ng a d ifferent
registe r in the cou nter each time. Therefore, the test can te l l a bus fa i l u re from a cou nter
fai l u re.
Note that, since both DFA blocks exercised in this test (the system interface and the cou nter)
are on the A6 board, the AS board is not i nvolved in this test other than to demonstrate
that bus i nterface c i rcu its on the AS board are not i n h ib iting the bus.
If this test fails, rem ove the AS Digital F i l ter assem bly and repeat the test. I f the test sti l l
f a i l s, start trou bl eshooti ng the system data b u s interface and data point cou nter bl ock
on the A6 board. If the test passes with the AS board removed, the fai l u re is on the AS
assemb ly; rep l ace the AS assem bly and conti n u e with the d i agnostic tests.
If Cl bit passes any of the echos tests, the bus l i ne transm itting that bit is good . If that
b it is bad on every test, the bus l i ne is probably defective. Any bit that passes some but
not all of the tests i n d i c ates a defective cou nter reg iste r.
If this test passes, the fo l l owing su bb locks are probably fu nction ing co rrectly:
Data Point Cou nter
System Data Bus I nterface
System Add ress Decoder
DMA BUS
The DMA b u s test shou ld be used, after the ope ration of the l ocal data bus is verified,
to test the operation of the i nterface between the local data bus and the DMA bus and
the DMA control ler I Cs.
This test is s i m i l ar to the local bus test described previously except that the DMA control ler
I Cs are used to echo data from the system CPU i n stead of the cou nter on the A6 board .
Refer to the block d i agrams in Section VI to visualize the data path. The c i rcu its exerc ised
are the system data i nterface on the A6 board and the local data/DMA bus i nterface and
DMA control lers on the AS board.
If this test passes, the fo l low ing are probab ly fu nction ing co rrectly:
Local Data Bus
DMA Bus
Local Data/DMA Bus I nterface
DMA contro l lers
S E RV I C E
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