HP 3562A Service Manual page 300

MO D E L 3 562A
HARDWA R E CONTROL R E G I ST E R O UTPUTS
Wi ndow l ocation. T h e d ata for the standard wi ndows is on the FFT board;
W I N lOC
the d ata for user def i ned windows are kept in global RAM .
Bank select, active h igh. Sel ects upper or l ower 32k of memory.
B N KSE lH
Swap two ha lves of the time buffer.
SWAP
Set cou nter two to c o u nt down, active l ow.
CTR2D N l
Measu rement is two-channel as opposed to si ngle channe l .
TWOCH
Data is real a s opposed to complex.
REA lDATA
These two l i nes sel ect one of th ree sequences for the I/O sequen cer; this
SEQSE lO
te l l s it how to control the cou nters and page register depend ing on whether
SEQS E l1
the execution is process ing a w i ndow, an FFT, or a dei nterlace (te rms
assoc i ated with FFT).
These th ree l i nes sel ect one of seven levels within the FFT process. The
lEV2
seven levels are: window, five butterfly passes, and (if necessary) deinterlace.
lEV1
E ach level processes an entire b lock of d ata i n memory. The LEV signals
lEVO
h e l p keep track of add ressing.
These three l i nes are u sed to choose one of fou r signals u sed by the test
T B S E l2
b it m ux.
T B S E l1
T B S E LO
These l i nes are u sed to select one of th ree signals to convey i nformation
SCAlE1
about the m ath resu lts on the previous l eve l to the page register.
SCAlEO
OTH E R S I G NALS
i D O O
SDOUTE N l
DIVBY4
D IV B Y2
PASS D O N E
D I DO N E
I RQ320
lDCAl
I nternal data bus l i nes 0 throu gh 1 5 .
System data bus output enable, active low.
Two l ines conveying information from the pseu do-scale ROM to the TMS320
test bit m u x concern i n g data size.
S i g n a l s the e n d o f a leve! (see L EV).
Same as PASSDO N E for the d e i nte rlace pass .
I nterrupt request to the TMS320 m i croprocessor.
Load coeff i c ient ad dress, active low. S i g n a l from the I/O sequencer w h i c h
loads data o n the internal data b u s into the coefficient ROM add ress i n puts.
C I RC U I T D E S C R I P T I O N S
.
6-81