HP 3562A Service Manual page 298

MO D E L 3562A
G LOBAL A D D R E S S B U S I N T E R FAC E
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The global address b u s i nterface (U51 1 and U 51 2) i s a l atch c i rc u it w h i c h exists between
the FFT add ress b u s and the global add ress bus. These l atches are cl ocked when the FFT
board req uests contro l of the global bus and are enabled when the FFT board is gra nted
contro l of the bus.
G LOBA L DATA B U S I N T E RFAC E
The global data bus i n terface appears as one read-on ly register and one write-only register
to the TMS320. They are enabled by si gnals G D B I N L and G D BOUTL from the port decoder.
G LOBA L BUS H A N D S H A K I N G
T h i s b lock is used to coord i n ate data transfers between the FFT board and global RAM .
When the FFT board needs access t o memory, it requ ests control o f the global bus by
activating R E Q G B L (req uest g lobal b u s) signal to the handshake b l ock. T h i s activates the
MRFFT L (memory req uest from FFT) signal going off the F FT board. When the MG FFTL
(m emory g rant to the FFT) signal becomes active, the mem ory req uest is rem oved and
the read or write is performed thro u g h the gl obal data bus i nterface. If the operation is
a read , the G DS L (g l obal data strobe) s ignal is u sed to i n d icate when the d ata on the bus
is val id. I f the operation is a write, the data is loaded i nto the write register at the same
time the G R/GWL (global read/global write) signal is set l ow to i nd icate to the memory
that the data on the bus is val id.
Pseudo-Scale ROM
A l l data ope rati ons are done in the TMS320 m i c roprocessor. The o n ly hardware doing
math operations outside the TMS320 is the pseu do-scale ROM (U 305). It looks at the internal
data bus on each data write cyc le and compares the up per e ight b its to val u es stored
in memory. The two output l i nes are rec locked by f l i p-flops in U208. The TMS320 c l ocks
them when it puts someth ing on the global data b u s . The f l i p-f lops store the largest val ue
output for that parti c u l ar pass of the FFT. Before beg i n n i n g the next pass, the TMS320
exami nes (and c lea rs) the D IVBY4 and D I V BY2 l i nes (horn the f l i p-f lops) to see how big
the data was on the l ast pass; it then can select a scale for the next pass.
The TMS320 keeps track of the add ress process via the Butterfly Type P LA (U 207) and
the Butterfly Su broutine Add ress ROM (U502)-hereafter referred to as the Butterfly ROM.
The Butterf ly ROM is a read-o nly po rt on the i nte rnal data bus which is activated by the
port decoder. The TMS320 u ses i nformation from this logic to keep track of execution
status of the transform to gu ide its m ath operations (he l p select su brouti nes). Depend i n g
on where execution i s i n t h e pass, t h e TY P E 2 B F l i ne from U207 te l ls the ROM w h i c h of
two types of butte rfly routi nes to execute.
C I RC U I T D E S C R I PT I O N S
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