HP 3562A Service Manual page 284

M O D E L 3562A
LD LOWY
MAN L
MYA D D R L
OPC LK
Q B O
Q 1
SSA D L
LOAD LOW Y B U S
Signal from control PA L 2 which l atches the u pper B1 6 to B 2 3 i nto
a global bus regi ster and YO to Y7 i nto a global bus reg iste r.
MAN T I SSA
T h i s signal enables the global bus registers output onto the Y b u s .
M Y A D D R E S S
Output s ignal o f t h e add ress comparator to indi cate t h e FPP assembly
has been add ressed by the A2 System CPU.
OPTION C LOCK
T h i s s ignal clocks the cond ition code of the FPP assem b ly i nto the
cond ition code m u lti plexor.
Q B I T 0
T h i s i n put to control PA L 1 determi nes whether C A1 L is l ow or h igh.
OUTPUT 1
The output of control PAL 1 to control PAL 2 to i n d i c ate w h i c h h a l f
o f a 3 2 b it global RAM transfer is t o occu r next.
S E T ADD
Fo rces an add operati o n .
C I RC U I T D E SC R I PT I O N S
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