HP 3562A Service Manual page 239

MO D E L 3562A
(Refer to figure 6-A 1 c) The phase resolution circuit is used in external and internal trig­
Phase Resolution Circuit
gered measurements. This circu it insures that the phase of a triggered measurement is
accu rate. S ince the trigger moment does not always occur on a sam ple and hold edge
(SAM P), there is a time delay and a phase error in the data. The phase resolution circuit
counts the time between samples and the time between a sample and a trigger. I t puts
th is information on the DS data bus which is read by the system CPU.
The ARML signal from the A6 Digital Filter Control ler i nitial izes the phase circuit and
starts the trigger measurement process. This signal is only active when a triggered measure­
ment is m ade. When the phase resol ution circu it receives this signal, it sets BFST low and
waits for the next sample clock (SAMP) from the ADC board. On the next sam p le clock
the phase circuit starts cou nting and cou nts u ntil a trigger signal (TR I G ROL, R E MTG L,
SWTRIG, or B U RSTR I G ) is received. If another sample clock is received before the trig­
ger signal, the phase state machine starts the count over and continues to wait for the
trigger s ignal, clearing the cou nters each time a sample clock is received. When a trigger
signal is received, the cou nters latch the first cou nt into their output registers and cOn­
ti nue counting u ntil the next sample clock. On the next sample clock after the trigger
signal, the second count is latched into the cou nters' output registers. BFST signal is then
sent to the d igital filter contro l ler tel l i ng it to start taking data.
The phase resolution circuit now has a count between sam ple points and a cou nt between
the first sam ple point and the trigger point. When the RD PH1 L or RDPH2L s ignal from
the device decoder PAL becomes active, the phase resol ution circuit puts the requested
count on the DS data bus. The tim ing information is held u ntil the next ARML signal is
received or unti l it is read by the system CPU.
C I RCUIT D E SCR I PT I O N S
6-1 7