Intel iAPX 86 User Manual page 12

FIGURE
1-1
1-2
1-3
1-4
1-5
1-6
1-7
2-1
2-2
2-3
2-4
2-5
3-1
3-2
3-3
3-4
3-5
5-1
5-2
5-3
5-4
6-1
1-1
1-2
TITLE PAGE
The iAPX 86,88 Family Development
Process .. . .. .. .. .. . . . .. .. .. .. .. . . .. .. .. .. .. . . .. . . .. .. .. .. .. .. 1-1
Library Linkage by LINK86 ........... ........... 1-3
The LINK86/LOC86 Process ..................... 1-4
8086 Addressing ............................. "............. 1-6
Segment Physical Relationships ................... 1-7
Segment Alignment Boundaries ................... 1-8
Memory Configuration of Program
with Overlays ................ :.......................... 1-10
LINK86 Input and Output Files ................ 2-1
LINK86 Print File Header ........................... 2-27
LINK86 Link Map ...................................... 2-27
LINK86 Group Map ................................... 2-28
LINK86 Symbol Table .... ............. ................ 2-29
CREF86 Input and Output Files ................ 3-1
Header of Cross-Reference Listing ............. 3-7
Warning Messages on CREF86 Listing ...... 3-7
Module List on CREF86 lListing ........... ..... 3-8
Symbol Cross-Reference Information ......... 3-9
LOC86 Input and Output Files .................. 5-1
LOC86 Symbol Table ................................... 5-22
LOC86 Memory Map ................................... 5-23
LOC86's Address Assignments for
Overlays ....... .......... ........ ................... ........ 5-26
OH86 Input and Output Files ..................... 6-1
LINK86 Print File for Bound
Object Module .......................................... 1-3
LOC86 Print File for Bound Object
Module ....................................................... 1-4
FIGURE
1-3
1-4
1-5
1-6
1-7
1-8
1-9
J-l
J-2
J-3
J-4
J-5
J-6
K-l
K-2
K-3
K-4
K-5
K-6
K-7
K-8
ILLUSTRATIONS
TITLE PAGE
LINK86 Default Print File .......................... 1-5
CREF86 Cross-Reference Listing ................ 1-6
LINK86 Listing for Program with
Overlays ..................................................... 1-9
LOC86 Listing for Program with
Overlays ..................................................... 1-10
LINK86 Map for Root File ......................... 1-11
Module Information for Overlays ................ 1-12
Memory Organization for Example 6 .......... 1-13
CREF86 Cross-Reference Listing ................ J-4
LINK86 Listing for Program with
Overlays ... ......... ......... ................. ............... J-7
LOC86 Listing for Program with
Overlays ..................................................... J-8
LINK86 Map for Root File ........ ................. J-9
Module Information for Overlays .. .............. J-I0
Memory Organization for Example 4 .......... J-ll
LINK86 Print File for Bound
Object Module ........................................ K-3
LINK86 Default Print File ........................ K-5
CREF86 Cross-Reference Listing .............. K-5
LINK86 Listing for Program with
Overlays ................................................... K-8
LOC86 Listing for Program with
Overlays ................................................... K-I0
LINK86 Map for Root File ....................... K-ll
Module Information for Overlays .............. K-12
Memory Organization for Example 6 ........ K-13
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