Toshiba 650CT Maintenance Manual page 7

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Video RAM
2 MB (four 256K x 16-bit EDO DRAM chips)
5 volt operation
Access time 60 ns
System Controller Gate Array
This gate array has the following functions:
- CPU interface/control
- Level-2 cache memory control
- DRAM control
- PCI master/slave interface
- Write buffer (CPU-DRAM, CPU-PCI, PCI-DRAM)
- Prefetch buffer (PCI-DRAM)
- Two DMACs:
- Two PICs:
- One PIT:
- Serial interrupt function
- Power management control
- Suspend/resume control
- CPU stop clock function
I/O Controller Gate Array
This gate array has the following functions:
- Two UARTs
- One FDC
- One parallel port control supported ECP
- ISA bus control
- PCI bus front end control
Multiplex Gate Array
This gate array is a multiplexer for a ZV-port.
PC Card Controller Gate Array
This gate array has the following functions:
- PC card control
- CardBus control
- ZV-port support (multiplex gate array control)
Miscellaneous Gate Array
This gate array has the following functions:
- Communication control
• Communication with KBC
2
• I
C bus interface
Communication with PS
Communication with Desk Station V Plus
Communication with EEPROM
• Communication register set
650CT
82C37 equivalent
82C59 equivalent
82C54 equivalent
16550A equivalent (One SIO is used for SIR.)
µPD765A equivalent
1-7

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