Fpga Configuration Data Source Jumper; External Ttl Inputs Select Jumpers - Pentek 6230 Operating Manual

32/16?channel digital receiver vim module for pentek vim baseboards
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Page 22
2.2
Jumper Block Settings
2.2.2
2.2.3
Rev.: B.4
(continued)

FPGA Configuration Data Source Jumper

Jumper JB9 selects the source of the Virtex FPGA configuration data down−
load. The FPGA can select its configuration data either from an on−board
Serial EEPROM or from a serial download (X−Checker cable), depending on
the setting of this jumper. The following table shows the jumper settings for
this FPGA configuration data source jumper. This jumper block has three
pins, similar to the Filter Bypass jumpers (see illustration in
prior page). (Refer to Virtex Config Register,
mation on reconfiguring the Virtex FPGAs.)
Table 2−2: FPGA Configuration Data Source Jumper
Jumper JB9 Position
Pins 1 − 2
Removed, or pins 2 − 3 *

External TTL Inputs Select Jumpers

Jumper block JB10 selects the input connector to use as the source of the
external TTL SYNC or TTL GATE inputs. Each TTL signal can be input from
either the 26−pin sync/gate connector (see
gate header (see
Section
the jumper settings for this jumper block.
Table 2−3: External TTL Inputs Select Jumpers
Jumper JB10 Position
Installed
Pins 1 − 2
Removed
Installed
Pins 3 − 4
Removed
1 − Factory Default Setting on Model 6231
2 − Factory Default Setting on Model 6230
Pentek Mo d el 6230/6231 Oper a ting Ma nu al
* Factory Default Setting
Section
2.4.4) on the front panel. The following table shows
External TTL Gate/Sync Inputs
1
TTL SYNC from 26−pin Sync/Gate Connector
2
TTL SYNC from 4−pin Sync/Gate/Trig Header
1
TTL GATE from 26−pin Sync/Gate Connector
2
TTL GATE from 4−pin Sync/Gate/Trig Header
Table
2−1, on
Section
3.3, for further infor−
FPGA Data Source
Serial Download
On−board Serial EEPROM
2.4.3) or the 4−pin sync/

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