Pentek 6230 Operating Manual page 218

ADM1024
Table XII. Register 43h, INT Interrupt Mask Register 1 (Power-On Default = 00h)
Bit Name
0 2.5 V/Ext. Temp2
1 V
CCP1
2 V
CC
3 5 V
4 Int. Temp
5 Ext. Temp1
6 FAN1/AIN1
7 FAN2/AIN2
Bit Name
0 12 V
1 V
CCP2
2 Reserved
3 Reserved
4 CI
THERM (Input)
5
6 D1 Fault
7 D2 Fault
Table XIV. Register 46h, Chassis Intrusion Clear (Power-On Default = 00h)
Bit Name
0–6 Reserved
7 Chassis Int. Clear
Table XV. Register 47h, VID0–3/FAN Divisor Register (Power-On Default 0101(VID3–0))
Bit Name
0–3 VID
4–5 FAN1 Divisor
6–7 FAN2 Divisor
Table XVI. Register 49h, VID4/Device ID Register (Power-On Default 1000000(VID4))
Bit Name
0 VID4
1–7 Reserved
R/W Description
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
Table XIII. Register 44h, INT Mask Register 2 (Power-On Default = 00h)
R/W Description
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
Read/Write Power-up default set to Low.
Read/Write Power-up default set to Low.
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
R/W Description
Read Only Undefined, always reads as 00h.
Read/Write A one outputs a minimum 20 ms active low pulse on the Chassis Intrusion
pin. The register bit clears itself after the pulse has been output.
R/W Description
Read The VID[3:0] inputs from processor core power supplies to indicate the
operating voltage (e.g., 1.3 V to 3.5 V)
Read/Write Sets counter prescaler for FAN1 speed measurement
<5:4> = 00 – divide by 1
<5:4> = 01 – divide by 2
<5:4> = 10 – divide by 4
<5:4> = 11 – divide by 8.
Read/Write Sets counter prescaler for FAN2 speed measurement
<7:6> = 00 – divide by 1
<7:6> = 01 – divide by 2
<7:6> = 10 – divide by 4
<7:6> = 11 – divide by 8.
R/W Description
Read Only VID4 Input from Pentium.
Read Only Undefined, always reads as 1000 000(VID4).
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REV. A