Pentek 6230 Operating Manual page 203

32/16?channel digital receiver vim module for pentek vim baseboards
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A-TO-D CONVERTER
These inputs are multiplexed into the on-chip, successive
approximation, analog-to-digital converter. This has a resolution
of eight bits. The basic input range is zero to 2.5 V, which is
the input range of AIN1 and AIN2, but five of the inputs have
built-in attenuators to allow measurement of 2.5 V, 5 V, 12 V
and the processor core voltages V
external components. To allow for the tolerance of these supply
voltages, the A-to-D converter produces an output of 3/4 full-scale
(decimal 192) for the nominal input voltage, and so has adequate
headroom to cope with overvoltages. Table III shows the input
ranges of the analog inputs and output codes of the A-to-D
converter.
When the ADC is running, it samples and converts an input
every 748 µs, except for the external temperature (D1 and D2)
inputs. These have special input signal conditioning and are
averaged over 16 conversions to reduce noise, and a measure-
ment on one of these inputs takes nominally 9.6 ms.
INPUT CIRCUITS
The internal structure for the analog inputs are shown in Figure
3. Each input circuit consists of an input protection diode, an
attenuator, plus a capacitor to form a first-order low-pass fil-
ter which gives the input immunity to high frequency noise.
80k
AIN1–AIN2
122.2k
+12V
22.7k
91.6k
+5V
55.2k
36.7k
+2.5V
IN
(SEE TEXT)
111.2k
+V
/
42.7k
CCP1
V
CCP2
97.3k
Figure 3. Structure of Analog Inputs
2.5 V INPUT PRECAUTIONS
When using the 2.5 V input, the following precautions should
be noted. There is a parasitic diode between Pin 18 and V
due to the presence of a PMOS current source (which is used
when Pin 18 is configured as a temperature input). This will
become forward-biased if Pin 18 is more than 0.3 V above V
Therefore, V
should never be powered off with a 2.5 V input
CC
connected.
SETTING OTHER INPUT RANGES
AIN1 and AIN2 can easily be scaled to voltages other than 2.5 V.
If the input voltage range is zero to some positive voltage, all
that is required is an input attenuator, as shown in Figure 4.
V
IN
Figure 4. Scaling AIN(1–2)
REV. A
and V
, without any
CCP1
CCP2
10pF
35pF
MUX
25pF
25pF
50pF
R1
AIN (1–2)
R2
Negative and bipolar input ranges can be accommodated by
using a positive reference voltage to offset the input voltage range
so it is always positive.
To measure a negative input voltage, an attenuator can be used
as shown in Figure 5.
Figure 5. Scaling and Offsetting AIN(1–2) for Negative
Inputs
This is a simple and cheap solution, but the following point
should be noted. Since the input signal is offset but not inverted,
the input range is transposed. An increase in the magnitude of
the –12 V supply (going more negative), will cause the input
voltage to fall and give a lower output code from the ADC.
Conversely, a decrease in the magnitude of the –12 V supply will
cause the ADC code to increase. The maximum negative voltage
corresponds to zero output from the ADC. This means that the
upper and lower limits will be transposed.
Bipolar input ranges can easily be accommodated. By making R1
equal to R2 and V
OS
ranges can be accommodated by adding a third resistor to set the
positive full-scale input voltage.
Figure 6. Scaling and Offsetting AIN(1–2) for Bipolar Inputs
(R3 has no effect as the input voltage at the device Pin is zero
when V
= minus full-scale.)
CC
IN
.
CC
(R2 has no effect as the input voltage at the device pin is 2.5 V
when V
= plus full-scale).
IN
Offset voltages other than 2.5 V can be used, but the calculation
becomes more complicated.
TEMPERATURE MEASUREMENT SYSTEM
Internal Temperature Measurement
The ADM1024 contains an on-chip bandgap temperature sensor,
whose output is digitized by the on-chip ADC. The temperature
data is stored in the Temperature Value Register (address 27h)
and the LSB from Bits 6 and 7 of the Temperature Configuration
–11–
ADM1024
R
1
(
V
– . )
2 5
=
FS
R
2
2 5
.
+V
OS
R2
R1
V
IN
AIN (1–2)
R
1
|
V
|
=
FS
R
2
V
OS
= 2.5 V, the input range is ±2.5 V. Other input
+V
OS
R2
R1
AIN (1–2)
V
IN
R3
R
1
|
V
|
=
FS
R
2
R
2
R
1
(
V
– . )
2 5
+
=
FS
R
3
2 5
.

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