Pentek 6210 Operating Manual page 45

Pe nt e k Mo del 6210 Oper ating Manual
3.12 Processor Interface the HSP50214 DDR
Table 3−15: Model 6210 − DDR Read Source Definitions
Read Code
(D2 : D0)
000
001
010
011
100
101
110
111
Table 3−16: Model 6210 − DDR Status Read Register − R/W @ 'C6x 0x0032 003C
Bit # D31 − D7
Bit
Reserved
Name
Bit Mask on
Function Reads
All bits default to the logic '0' state at power−up and resets.
Data
Source
I & Q Buffer RAM
Magnitude & Phase Buffer
RAM
Buffered Frequency
N o t U s e d
Input Level Detector
N o t U s e d
D6 D5
Internal_FIFO_Depth
# of 80−bit (16−bit I, Q, |r|, φ & ƒ)
samples in Internal FIFO
(continued)
Data Returned
Type
I (LSB)
I (MSB)
Q (LSB)
Q (MSB)
Mag (LSB)
Mag (MSB)
Phase (LSB)
Phase (MSB)
Freq (LSB)
Freq (MSB)
N o t A p p l i c a b l e
Input AGC (LSB)
Input AGC (NSB)
Input AGC (MSB)
N o t A p p l i c a b l e
D4 D3
Internal_
Internal_
FIFO_Full
FIFO_Empty
1 = T r u e
0 = F a l s e
P age 45
Where
DDR0
DDR1
DDR2
DDR3
DDR0
DDR1
DDR2
DDR3
DDR0
DDR1
DDR0
DDR1
DDR2
D2 D1
Buffer_ Integration_
Ready Complete
1 = Not Ready 1 = Complete
0 = Ready 0 = Incomplete
D0
Rev.: C