Pentek 6210 Operating Manual page 102

Pentek dual a/d converter and digital receiver vim module for pentek vim motherboards
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CONTROL WORD 20: BUFFER RAM, DIRECT PARALLEL, AND DIRECT SERIAL OUTPUT CONFIGURATION
BIT
POSITION
FUNCTION
11-10
Q Data Serial Output
Tag Bit
9-8
Magnitude Data Serial
Output Tag Bit
7-6
Phase Data Serial
Output Tag Bit
5-4
Frequency Data Serial
Output Tag Bit
3-2
AGC Data Serial Out-
put Tag Bit
1-0
Timing Error Data Se-
rial Output Tag Bit
CONTROL WORD 21: BUFFER RAM OUTPUT CONTROL REGISTER (SYNCHRONIZED TO PROCCLK)
BIT
POSITION
FUNCTION
31-16
Reserved
15
Output Buffer Mode
14-12
FIFO Mode Depth
Threshold
11-4
Snapshot Mode
Interval
3-0
Snapshot Mode
Number of Samples
CONTROL WORD 22: BUFFER RAM OUTPUT FIFO RESET (SYNCHRONIZED TO PROCCLK)
BIT
POSITION
FUNCTION
N/A
FIFO reset
CONTROL WORD 23: INCREMENT OUTPUT FIFO (SYNCHRONIZED TO PROCCLK)
BIT
POSITION
FUNCTION
N/A
FIFO Strobe
(SYNCHRONIZED TO CLKIN OR PROCCLK DEPENDING ON PROGRAMMING IN CONTROL WORD 0)
BIT
POSITION
FUNCTION
N/A
SYNCOUT Strobe
3-54
HSP50214B
(SYNCHRONIZED WITH PROCCLK) (CONTINUED)
(See I Data Serial Output Tag selection above).
(See I Data Serial Output Tag selection above).
(See I Data Serial Output Tag selection above).
(See I Data Serial Output Tag selection above).
(See I Data Serial Output Tag selection above).
(See I Data Serial Output Tag selection above).
Reserved.
0- The output buffer operates in snapshot mode.
1- The output buffer operates in FIFO mode.
In FIFO mode, when the FIFO depth reaches this threshold, an interrupt is generated and the READY
flag is asserted. The threshold may be set from 0 to 7. Bit 14 is the MSB. The interrupt is generated when
the FIFO depth reaches the threshold, as the FIFO fills.
In snapshot mode, the interval between snapshots in the output sample times is determined by this 8-
8
bit binary number, i.e. 256, (2
ter to 1 less than the desired interval. Bit 11 is the MSB.
In snapshot mode, the number of samples stored each time the snapshot interval counter times out is
equal to the decimal version of this 4-bit number. The range is 1- 8. Bit 3 is the MSB.
A write to this address increments the output FIFO RAM address pointers to READ = 111 and WRITE
= 000.
A write to this address increments the output FIFO/buffer to the next sample set.
CONTROL WORD 24: SYNCOUT STROBE OUTPUT PIN
A write to this address generates a one clock period wide strobe on the SYNCOUT pin that is synchro-
nized to the clock. This strobe may be synchronized to CLKIN or PROCCLK based on the programming
of bit 3 of Control Word 0.
DESCRIPTION
DESCRIPTION
), sample time counts between snapshot samples. Program this parame-
DESCRIPTION
DESCRIPTION
DESCRIPTION

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