Pentek 6210 Operating Manual page 37

Pe nt e k Mo del 6210 Oper ating Manual
3.7 Programmable Amplifier Gain
3.7.1
Table 3−7: Model 6210 − Gain Control Word vs. Full Scale Input Amplitude
Gain Control Word
Decimal
250
500
750
1000
NOTE: The values given in this table DO NOT account for insertion loss of the low−pass input filter,
Table 3−8: Model 6210 − Sequence for Loading Gain Control Word
Write #
− Initial state. Chip select asserted (default power−up state).
1
2 Assert chip select & setup bit 11, MSB of the GCW.
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
Loading the 12−bit Gain Control Word
Hex
0x00FA
0x01F4
0x02EE
0x03E8
which may be as high as 5 dB.
Description
De−assert chip select.
Latch bit 11, MSB of the GCW.
Setup bit 10 of the GCW.
Latch bit 10 of the GCW.
Setup bit 09 of the GCW.
Latch bit 09 of the GCW.
Setup bit 08 of the GCW.
Latch bit 08 of the GCW.
Setup bit 07 of the GCW.
Latch bit 07 of the GCW.
Setup bit 06 of the GCW.
Latch bit 06 of the GCW.
Setup bit 05 of the GCW.
Latch bit 05 of the GCW.
Setup bit 04 of the GCW.
Latch bit 04 of the GCW.
Setup bit 03 of the GCW.
Latch bit 03 of the GCW.
Setup bit 02 of the GCW.
Latch bit 02 of the GCW.
Setup bit 01 of the GCW.
Latch bit 01 of the GCW.
Setup bit 00, LSB of the GCW.
Latch bit 00, LSB of the GCW.
De−assert chip select.
(continued)
Full Scale Input Amplitude
(Standard)
10 dBm
0 dBm
−10 dBm
−20 dBm
(continued)
Full Scale Input Amplitude
(Option 102)
0 dBm
−10 dBm
−20 dBm
−30 dBm
D2 D1
0 0
1 0
0 (GCW bit 11)
0 (GCW bit 11)
0 (GCW bit 10)
0 (GCW bit 10)
0 (GCW bit 9)
0 (GCW bit 9)
0 (GCW bit 8)
0 (GCW bit 8)
0 (GCW bit 7)
0 (GCW bit 7)
0 (GCW bit 6)
0 (GCW bit 6)
0 (GCW bit 5)
0 (GCW bit 5)
0 (GCW bit 4)
0 (GCW bit 4)
0 (GCW bit 3)
0 (GCW bit 3)
0 (GCW bit 2)
0 (GCW bit 2)
0 (GCW bit 1)
0 (GCW bit 1)
0 (GCW bit 0)
0 (GCW bit 0)
1 0
P age 37
D0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Rev.: C