15/25) (Dv/Rf Signal Process) - Sony HVR-Z1J Service Manual

For Schematic Diagram
• Refer to page 4-165 for printed wiring board. • Ref. No.; 10,000 Series.
2 3
1
:Voltage measurement of the CSP IC
VC-367 BOARD(15/25)
and the Transistors with
DV/RF SIGNAL PROCESS not possible.
A
XX MARK:NO MOUNT
TRRT
B @C090
TRRT
(11/25,14/25,22/25,23/25)
VSP_SO
VSP_SO
@C055
XVSP_SCK
XVSP_SCK
(7/25,19/25,23/25,24/25)
XRST_VTR
C
XRST_VTR
NOT USE XSYS_RST
XSYS_RST
XRST_IC4001
XRST_IC4001
XCS_IC4001
@C100
XCS_IC4001
CS_IC4001_BUS
CS_IC4001_BUS
D
(23/25)
ATF_LATCH
ATF_LATCH
SWP
@C101
SWP
(23/25,24/25,25/25)
ALE
ALE
WRX
WRX
RDX
E
RDX
D31A07
D31A07
D30A06
@C087
D30A06
D29A05
D29A05
(11/25,14/25,23/25) D28A04
D28A04
D27A03
D27A03
D26A02
D26A02
D25A01
D25A01
D24A00
F
D24A00
DXXA09
DXXA09
DXXA08
DXXA08
FRRV
@C065 FRRV
(7/25,11/25,14/25,
22/25,23/25,25/25)
G
DRP
@C091 DRP
(11/25,23/25)
TRRV
TRRV
@C061
VSP_SI
VSP_SI
(7/25,23/25)
XACC
XACC
XENA
H
XENA
DIR
DIR
FCLR
@C096 FCLR
LBUS3
LBUS3
(14/25) LBUS2
LBUS2
LBUS1
LBUS1
LBUS0
LBUS0
TRCKO
TRCKO
I
J
K
VITCK
VITDT
VITDT
CRECA1
@C081 CRECA1
CRECA2
CRECA2
(11/25)
CRECCK
CRECCK
CRECDT
CRECDT
L
@C102
RFIN
RFIN
(24/25)
16
HVR-Z1J/Z1U/Z1N/Z1E/Z1P/Z1C
4 5 6 7
mark,is
192 191 190 189 188 187 186 185
C4005
0.1u
IOVDD2(3.0V)
AMC
XVSP_SCK
MSSCK
INTV1(1.5V)
MSCSS
MA2
MA6
C4006 MA10
0.1u
IOVDD1(3.0V)
IOGND1(3V)
INTV2(1.5V)
HYI_PLL27IN
HYO
RYI0_DE0
YO0
RYI2_DE2
YO2
DSCK_VM
TICK 27M
R4003
0 IOGND3(3.0V)
C4007
SMC
XX
FLAT_SYNC_FYO0
FLAT_SYNC
MFLG_QRST
TMFLG
INTG3(1.5V)
CK64FSO
BCK
R4017 0
INTV3(1.5V)
MDQ1
C4003
MDQ5
0.1u
IOGND2(3.0V)
PBCK
ADDT0
PLLSW
INTV4(1.5V)
R4001 0
VICKO
IOVDD3(3.0V)
TRST
DICK
INTV5(1.5V)
C4004
4.7u
NC
C
DICO_DVDD
L4001
C4008
10uH
0.1u VRT
ADGND
C4001
XX OSCIN
OVDD
CL4002
CRECCK
RECCKO
R4004 0
PLLSVDD
C4002
L4002
10uH 4.7u
MXWE
C
R4002
INTG5(1.5V)
0
CRECDT
RECDT
CL4003
IOGND5(3.0V)
CRECA2
RECA2
CRECA1
RECA1
49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96
DIR
XRST_IC4001 R4005 0
C4009
0.1u
B
4-91
8 9 10 11
L4003
L4004
XX
XX
C4011
XX
R4007
C4013
XX
XX
C4012
0.1u
CL4004
184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156
IC4001
DV SIGNAL PROCESS
RF SIGNAL PROCESS
IC4001
UPD15002AFC-DN2-E2-A
CSP(CHIP SIZE PACKAGE)IC
C4014
XX
R4006
R4008
XX
XX
12 13 14
1.5V
2.9V
C4022
C4021
0.1u
0.1u
B
B
155 154 153 152 151 150 149 148 147 146 145
INTV8(1.5V)
TGCK
C4019
PLLRGND
XX
OGND
OSCVDD
CL4007
RFIN
RFIN
C4018
4.7u
AGND
C
DICO_AVDD
L4007
MDQ14
10uH
MDQ15
MDQ13
MDQ10
ADDT2
ADDT5
MDQ7
MDQ3
FS_EDGE_REF
FS_EDGE_REF
ADATAIN1
ADATAIN1
ADATAOUT1
ADATAOUT1
RCI3_DE7
CO3
RCI2_DE6
CO2
RCI0_DE4
CO0
RCO3_FRMREF
CI3
RCO1_EDVD
CI1
RYO2_DEFLD
YI2
RYO0_DEHD
YI0
TFS_FCO
TFS
CL4006
MA8
MA4
MA1
VSP_SO
MSI2ROTA
INTG1(1.5V)
TRRT
TRRT
TRRV
TRRV
RDX
RDX
D31A07
MCDA7
INTV7(1.5V)
D25A01
MCDA1
XENA
XENA
FCLR
FCLR
TRCKO
TRCKO
CCDMODE1
C4020
TEST1
0.1u
R4011 0
CCDMODE0
IOVDD6(3.0V)
MXCAS
MXCS
PLLSGND
C4015
0.1u
R4009
0
C4016 C4017
4.7u 4.7u
C C
L4005
L4006
10uH 10uH
4-92
15 16 17
R4012
0
D1_1.5V
FB4001
0uH
D1_2.8V
R4014 @C103
1.5V
0
A_1.5V
(25/25)
R4015
2.9V
0
A1_2.8V
@C058
VCK
(7/25,24/25)
HYO_SLGATE
HYO_SLGATE
RYO0_DEHD
RYO0_DEHD
RYO1_DEVD
RYO1_DEVD
RYO2_DEFLD
RYO2_DEFLD
RYO3_SGOUT
RYO3_SGOUT
HCO_FYI1
HCO_FYI1
RCO0_EDHD
RCO0_EDHD
RCO1_EDVD
RCO1_EDVD
RCO2_EDFLD
RCO2_EDFLD
RCO3_FRMREF
RCO3_FRMREF
HYI_PLL27IN
HYI_PLL27IN
RYI0_DE0
RYI0_DE0
RYI1_DE1
RYI1_DE1
RYI2_DE2
RYI2_DE2
RYI3_DE3
RYI3_DE3
HCI_FYI0
HCI_FYI0
@C048
RCI0_DE4
RCI0_DE4
RCI1_DE5
RCI1_DE5
(7/25)
RCI2_DE6
RCI2_DE6
RCI3_DE7
RCI3_DE7
MFLG_QRST
MFLG_QRST
TFS_FCO
TFS_FCO
THYRQ_FVDI
THYRQ_FVDI
THCRQ_FHDI
THCRQ_FHDI
VLAT_SYNC_FCI
VLAT_SYNC_FCI
FLAT_SYNC_FYO0
FLAT_SYNC_FYO0
VLAT_IN_FYO1
VLAT_IN_FYO1
FS_EDGE_REF
FS_EDGE_REF
FRAT_REFO
FRAT_REFO
ADATAIN1
ADATAIN1
ADATAOUT0
ADATAOUT0
ADATAOUT1
ADATAOUT1
DSCK_VM
@C057
DSCK_VM
(7/25,20/25)
ADATAIN0
@C051
ADATAIN0
(7/25,18/25)
CKFSO
@C060
CKFSO
(7/25,18/25,19/25,20/25)
CK64FSO
@C062
CK64FSO
(7/25,18/25,19/25)
VC-367 (15/25)